Added TXDR flush via TXE set to the drop guard for write_dma_internal_slave; factored in remaining DMA transfers for the return values for write_dma_internal_slave and read_dma_internal_slave

1 files changed, 8 insertions, 1 deletions

diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
index 57a7acee7..4527e55b9 100644
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@@ -1235,6 +1235,7 @@ impl<'d> I2c<'d, Async, MultiMaster> {
                 regs.cr1().modify(|w| w.set_tcie(true));
                 Poll::Pending
             } else if isr.stopf() {
+                remaining_len = remaining_len.saturating_add(dma_transfer.get_remaining_transfers() as usize);
                 regs.icr().write(|reg| reg.set_stopcf(true));
                 let poll = Poll::Ready(Ok(total_len - remaining_len));
                 poll
@@ -1274,7 +1275,8 @@ impl<'d> I2c<'d, Async, MultiMaster> {
                 w.set_txdmaen(false);
                 w.set_stopie(false);
                 w.set_tcie(false);
-            })
+            });
+            regs.isr().write(|w| w.set_txe(true));
         });
 
         let state = self.state;
@@ -1297,6 +1299,11 @@ impl<'d> I2c<'d, Async, MultiMaster> {
                 self.info.regs.cr1().modify(|w| w.set_tcie(true));
                 Poll::Pending
             } else if isr.stopf() {
+                let mut leftover_bytes = dma_transfer.get_remaining_transfers();
+                if !self.info.regs.isr().read().txe() {
+                    leftover_bytes = leftover_bytes.saturating_add(1);
+                }
+                remaining_len = remaining_len.saturating_add(leftover_bytes as usize);
                 self.info.regs.icr().write(|reg| reg.set_stopcf(true));
                 if remaining_len > 0 {
                     dma_transfer.request_pause();