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authorDario Nieuwenhuis <[email protected]>2023-06-08 16:08:40 +0200
committerDario Nieuwenhuis <[email protected]>2023-06-08 18:00:48 +0200
commit921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 (patch)
treebd21fba9800471b860ca44e05567588dcc1afef7 /embassy-stm32
parent87ad66f2b4a5bfd36dfc8d8aad5492e9e3f915e6 (diff)
Make interrupt module more standard.
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`. - Reexport the PAC interrupt enum in `embassy_xx::interrupt`. This has a few advantages: - The `embassy_xx::interrupt` module is now more "standard". - It works with `cortex-m` functions for manipulating interrupts, for example. - It works with RTIC. - the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs. - When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
Diffstat (limited to 'embassy-stm32')
-rw-r--r--embassy-stm32/build.rs8
-rw-r--r--embassy-stm32/src/dcmi.rs24
-rw-r--r--embassy-stm32/src/dma/bdma.rs6
-rw-r--r--embassy-stm32/src/dma/dma.rs6
-rw-r--r--embassy-stm32/src/dma/gpdma.rs4
-rw-r--r--embassy-stm32/src/eth/v1/mod.rs10
-rw-r--r--embassy-stm32/src/eth/v2/mod.rs10
-rw-r--r--embassy-stm32/src/exti.rs4
-rw-r--r--embassy-stm32/src/flash/asynch.rs10
-rw-r--r--embassy-stm32/src/i2c/mod.rs6
-rw-r--r--embassy-stm32/src/i2c/v1.rs4
-rw-r--r--embassy-stm32/src/i2c/v2.rs6
-rw-r--r--embassy-stm32/src/lib.rs55
-rw-r--r--embassy-stm32/src/sdmmc/mod.rs16
-rw-r--r--embassy-stm32/src/time_driver.rs2
-rw-r--r--embassy-stm32/src/timer/mod.rs6
-rw-r--r--embassy-stm32/src/tl_mbox/mod.rs18
-rw-r--r--embassy-stm32/src/usart/buffered.rs10
-rw-r--r--embassy-stm32/src/usart/mod.rs18
-rw-r--r--embassy-stm32/src/usb/mod.rs6
-rw-r--r--embassy-stm32/src/usb/usb.rs6
-rw-r--r--embassy-stm32/src/usb_otg/mod.rs10
-rw-r--r--embassy-stm32/src/usb_otg/usb.rs8
23 files changed, 121 insertions, 132 deletions
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs
index 730c78f5e..267fec387 100644
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@@ -160,13 +160,11 @@ fn main() {
160 } 160 }
161 161
162 g.extend(quote! { 162 g.extend(quote! {
163 pub mod interrupt { 163 embassy_cortex_m::interrupt_mod!(
164 use crate::pac::Interrupt as InterruptEnum;
165 use embassy_cortex_m::interrupt::_export::declare;
166 #( 164 #(
167 declare!(#irqs); 165 #irqs,
168 )* 166 )*
169 } 167 );
170 }); 168 });
171 169
172 // ======== 170 // ========
diff --git a/embassy-stm32/src/dcmi.rs b/embassy-stm32/src/dcmi.rs
index c13915a1b..41305d273 100644
--- a/embassy-stm32/src/dcmi.rs
+++ b/embassy-stm32/src/dcmi.rs
@@ -8,7 +8,7 @@ use embassy_sync::waitqueue::AtomicWaker;
8use crate::dma::Transfer; 8use crate::dma::Transfer;
9use crate::gpio::sealed::AFType; 9use crate::gpio::sealed::AFType;
10use crate::gpio::Speed; 10use crate::gpio::Speed;
11use crate::interrupt::Interrupt; 11use crate::interrupt::typelevel::Interrupt;
12use crate::{interrupt, Peripheral}; 12use crate::{interrupt, Peripheral};
13 13
14/// Interrupt handler. 14/// Interrupt handler.
@@ -16,7 +16,7 @@ pub struct InterruptHandler<T: Instance> {
16 _phantom: PhantomData<T>, 16 _phantom: PhantomData<T>,
17} 17}
18 18
19impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 19impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
20 unsafe fn on_interrupt() { 20 unsafe fn on_interrupt() {
21 let ris = crate::pac::DCMI.ris().read(); 21 let ris = crate::pac::DCMI.ris().read();
22 if ris.err_ris() { 22 if ris.err_ris() {
@@ -119,7 +119,7 @@ where
119 pub fn new_8bit( 119 pub fn new_8bit(
120 peri: impl Peripheral<P = T> + 'd, 120 peri: impl Peripheral<P = T> + 'd,
121 dma: impl Peripheral<P = Dma> + 'd, 121 dma: impl Peripheral<P = Dma> + 'd,
122 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 122 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
123 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 123 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
124 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 124 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
125 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 125 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -143,7 +143,7 @@ where
143 pub fn new_10bit( 143 pub fn new_10bit(
144 peri: impl Peripheral<P = T> + 'd, 144 peri: impl Peripheral<P = T> + 'd,
145 dma: impl Peripheral<P = Dma> + 'd, 145 dma: impl Peripheral<P = Dma> + 'd,
146 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 146 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
147 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 147 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
148 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 148 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
149 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 149 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -169,7 +169,7 @@ where
169 pub fn new_12bit( 169 pub fn new_12bit(
170 peri: impl Peripheral<P = T> + 'd, 170 peri: impl Peripheral<P = T> + 'd,
171 dma: impl Peripheral<P = Dma> + 'd, 171 dma: impl Peripheral<P = Dma> + 'd,
172 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 172 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
173 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 173 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
174 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 174 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
175 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 175 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -197,7 +197,7 @@ where
197 pub fn new_14bit( 197 pub fn new_14bit(
198 peri: impl Peripheral<P = T> + 'd, 198 peri: impl Peripheral<P = T> + 'd,
199 dma: impl Peripheral<P = Dma> + 'd, 199 dma: impl Peripheral<P = Dma> + 'd,
200 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 200 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
201 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 201 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
202 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 202 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
203 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 203 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -227,7 +227,7 @@ where
227 pub fn new_es_8bit( 227 pub fn new_es_8bit(
228 peri: impl Peripheral<P = T> + 'd, 228 peri: impl Peripheral<P = T> + 'd,
229 dma: impl Peripheral<P = Dma> + 'd, 229 dma: impl Peripheral<P = Dma> + 'd,
230 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 230 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
231 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 231 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
232 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 232 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
233 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 233 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -249,7 +249,7 @@ where
249 pub fn new_es_10bit( 249 pub fn new_es_10bit(
250 peri: impl Peripheral<P = T> + 'd, 250 peri: impl Peripheral<P = T> + 'd,
251 dma: impl Peripheral<P = Dma> + 'd, 251 dma: impl Peripheral<P = Dma> + 'd,
252 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 252 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
253 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 253 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
254 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 254 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
255 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 255 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -273,7 +273,7 @@ where
273 pub fn new_es_12bit( 273 pub fn new_es_12bit(
274 peri: impl Peripheral<P = T> + 'd, 274 peri: impl Peripheral<P = T> + 'd,
275 dma: impl Peripheral<P = Dma> + 'd, 275 dma: impl Peripheral<P = Dma> + 'd,
276 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 276 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
277 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 277 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
278 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 278 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
279 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 279 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -299,7 +299,7 @@ where
299 pub fn new_es_14bit( 299 pub fn new_es_14bit(
300 peri: impl Peripheral<P = T> + 'd, 300 peri: impl Peripheral<P = T> + 'd,
301 dma: impl Peripheral<P = Dma> + 'd, 301 dma: impl Peripheral<P = Dma> + 'd,
302 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 302 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
303 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 303 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
304 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 304 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
305 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 305 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -570,7 +570,7 @@ mod sealed {
570} 570}
571 571
572pub trait Instance: sealed::Instance + 'static { 572pub trait Instance: sealed::Instance + 'static {
573 type Interrupt: Interrupt; 573 type Interrupt: interrupt::typelevel::Interrupt;
574} 574}
575 575
576pin_trait!(D0Pin, Instance); 576pin_trait!(D0Pin, Instance);
@@ -602,7 +602,7 @@ macro_rules! impl_peripheral {
602 } 602 }
603 603
604 impl Instance for crate::peripherals::$inst { 604 impl Instance for crate::peripherals::$inst {
605 type Interrupt = crate::interrupt::$irq; 605 type Interrupt = crate::interrupt::typelevel::$irq;
606 } 606 }
607 }; 607 };
608} 608}
diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs
index 7a1ecda35..83ab4b18f 100644
--- a/embassy-stm32/src/dma/bdma.rs
+++ b/embassy-stm32/src/dma/bdma.rs
@@ -14,7 +14,7 @@ use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError};
14use super::word::{Word, WordSize}; 14use super::word::{Word, WordSize};
15use super::Dir; 15use super::Dir;
16use crate::_generated::BDMA_CHANNEL_COUNT; 16use crate::_generated::BDMA_CHANNEL_COUNT;
17use crate::interrupt::Interrupt; 17use crate::interrupt::typelevel::Interrupt;
18use crate::pac; 18use crate::pac;
19use crate::pac::bdma::{regs, vals}; 19use crate::pac::bdma::{regs, vals};
20 20
@@ -70,8 +70,8 @@ static STATE: State = State::new();
70pub(crate) unsafe fn init(irq_priority: Priority) { 70pub(crate) unsafe fn init(irq_priority: Priority) {
71 foreach_interrupt! { 71 foreach_interrupt! {
72 ($peri:ident, bdma, $block:ident, $signal_name:ident, $irq:ident) => { 72 ($peri:ident, bdma, $block:ident, $signal_name:ident, $irq:ident) => {
73 crate::interrupt::$irq::set_priority(irq_priority); 73 crate::interrupt::typelevel::$irq::set_priority(irq_priority);
74 crate::interrupt::$irq::enable(); 74 crate::interrupt::typelevel::$irq::enable();
75 }; 75 };
76 } 76 }
77 crate::_generated::init_bdma(); 77 crate::_generated::init_bdma();
diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs
index 3b602b991..17313b310 100644
--- a/embassy-stm32/src/dma/dma.rs
+++ b/embassy-stm32/src/dma/dma.rs
@@ -13,7 +13,7 @@ use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError};
13use super::word::{Word, WordSize}; 13use super::word::{Word, WordSize};
14use super::Dir; 14use super::Dir;
15use crate::_generated::DMA_CHANNEL_COUNT; 15use crate::_generated::DMA_CHANNEL_COUNT;
16use crate::interrupt::Interrupt; 16use crate::interrupt::typelevel::Interrupt;
17use crate::pac::dma::{regs, vals}; 17use crate::pac::dma::{regs, vals};
18use crate::{interrupt, pac}; 18use crate::{interrupt, pac};
19 19
@@ -149,8 +149,8 @@ static STATE: State = State::new();
149pub(crate) unsafe fn init(irq_priority: Priority) { 149pub(crate) unsafe fn init(irq_priority: Priority) {
150 foreach_interrupt! { 150 foreach_interrupt! {
151 ($peri:ident, dma, $block:ident, $signal_name:ident, $irq:ident) => { 151 ($peri:ident, dma, $block:ident, $signal_name:ident, $irq:ident) => {
152 interrupt::$irq::set_priority(irq_priority); 152 interrupt::typelevel::$irq::set_priority(irq_priority);
153 interrupt::$irq::enable(); 153 interrupt::typelevel::$irq::enable();
154 }; 154 };
155 } 155 }
156 crate::_generated::init_dma(); 156 crate::_generated::init_dma();
diff --git a/embassy-stm32/src/dma/gpdma.rs b/embassy-stm32/src/dma/gpdma.rs
index 7f8b82b46..07fef360f 100644
--- a/embassy-stm32/src/dma/gpdma.rs
+++ b/embassy-stm32/src/dma/gpdma.rs
@@ -56,8 +56,8 @@ static STATE: State = State::new();
56pub(crate) unsafe fn init(irq_priority: Priority) { 56pub(crate) unsafe fn init(irq_priority: Priority) {
57 foreach_interrupt! { 57 foreach_interrupt! {
58 ($peri:ident, gpdma, $block:ident, $signal_name:ident, $irq:ident) => { 58 ($peri:ident, gpdma, $block:ident, $signal_name:ident, $irq:ident) => {
59 crate::interrupt::$irq::set_priority(irq_priority); 59 crate::interrupt::typelevel::$irq::set_priority(irq_priority);
60 crate::interrupt::$irq::enable(); 60 crate::interrupt::typelevel::$irq::enable();
61 }; 61 };
62 } 62 }
63 crate::_generated::init_gpdma(); 63 crate::_generated::init_gpdma();
diff --git a/embassy-stm32/src/eth/v1/mod.rs b/embassy-stm32/src/eth/v1/mod.rs
index a5f1a268d..540cdd027 100644
--- a/embassy-stm32/src/eth/v1/mod.rs
+++ b/embassy-stm32/src/eth/v1/mod.rs
@@ -5,7 +5,6 @@ mod tx_desc;
5 5
6use core::sync::atomic::{fence, Ordering}; 6use core::sync::atomic::{fence, Ordering};
7 7
8use embassy_cortex_m::interrupt::Interrupt;
9use embassy_hal_common::{into_ref, PeripheralRef}; 8use embassy_hal_common::{into_ref, PeripheralRef};
10use stm32_metapac::eth::vals::{Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf}; 9use stm32_metapac::eth::vals::{Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf};
11 10
@@ -14,6 +13,7 @@ pub(crate) use self::tx_desc::{TDes, TDesRing};
14use super::*; 13use super::*;
15use crate::gpio::sealed::{AFType, Pin as __GpioPin}; 14use crate::gpio::sealed::{AFType, Pin as __GpioPin};
16use crate::gpio::AnyPin; 15use crate::gpio::AnyPin;
16use crate::interrupt::InterruptExt;
17#[cfg(eth_v1a)] 17#[cfg(eth_v1a)]
18use crate::pac::AFIO; 18use crate::pac::AFIO;
19#[cfg(any(eth_v1b, eth_v1c))] 19#[cfg(any(eth_v1b, eth_v1c))]
@@ -24,7 +24,7 @@ use crate::{interrupt, Peripheral};
24/// Interrupt handler. 24/// Interrupt handler.
25pub struct InterruptHandler {} 25pub struct InterruptHandler {}
26 26
27impl interrupt::Handler<interrupt::ETH> for InterruptHandler { 27impl interrupt::typelevel::Handler<interrupt::typelevel::ETH> for InterruptHandler {
28 unsafe fn on_interrupt() { 28 unsafe fn on_interrupt() {
29 WAKER.wake(); 29 WAKER.wake();
30 30
@@ -100,7 +100,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
100 pub fn new<const TX: usize, const RX: usize>( 100 pub fn new<const TX: usize, const RX: usize>(
101 queue: &'d mut PacketQueue<TX, RX>, 101 queue: &'d mut PacketQueue<TX, RX>,
102 peri: impl Peripheral<P = T> + 'd, 102 peri: impl Peripheral<P = T> + 'd,
103 _irq: impl interrupt::Binding<interrupt::ETH, InterruptHandler> + 'd, 103 _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::ETH, InterruptHandler> + 'd,
104 ref_clk: impl Peripheral<P = impl RefClkPin<T>> + 'd, 104 ref_clk: impl Peripheral<P = impl RefClkPin<T>> + 'd,
105 mdio: impl Peripheral<P = impl MDIOPin<T>> + 'd, 105 mdio: impl Peripheral<P = impl MDIOPin<T>> + 'd,
106 mdc: impl Peripheral<P = impl MDCPin<T>> + 'd, 106 mdc: impl Peripheral<P = impl MDCPin<T>> + 'd,
@@ -267,8 +267,8 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
267 P::phy_reset(&mut this); 267 P::phy_reset(&mut this);
268 P::phy_init(&mut this); 268 P::phy_init(&mut this);
269 269
270 interrupt::ETH::unpend(); 270 interrupt::ETH.unpend();
271 interrupt::ETH::enable(); 271 interrupt::ETH.enable();
272 272
273 this 273 this
274 } 274 }
diff --git a/embassy-stm32/src/eth/v2/mod.rs b/embassy-stm32/src/eth/v2/mod.rs
index 9efa436ac..3e45eafd5 100644
--- a/embassy-stm32/src/eth/v2/mod.rs
+++ b/embassy-stm32/src/eth/v2/mod.rs
@@ -2,20 +2,20 @@ mod descriptors;
2 2
3use core::sync::atomic::{fence, Ordering}; 3use core::sync::atomic::{fence, Ordering};
4 4
5use embassy_cortex_m::interrupt::Interrupt;
6use embassy_hal_common::{into_ref, PeripheralRef}; 5use embassy_hal_common::{into_ref, PeripheralRef};
7 6
8pub(crate) use self::descriptors::{RDes, RDesRing, TDes, TDesRing}; 7pub(crate) use self::descriptors::{RDes, RDesRing, TDes, TDesRing};
9use super::*; 8use super::*;
10use crate::gpio::sealed::{AFType, Pin as _}; 9use crate::gpio::sealed::{AFType, Pin as _};
11use crate::gpio::{AnyPin, Speed}; 10use crate::gpio::{AnyPin, Speed};
11use crate::interrupt::InterruptExt;
12use crate::pac::ETH; 12use crate::pac::ETH;
13use crate::{interrupt, Peripheral}; 13use crate::{interrupt, Peripheral};
14 14
15/// Interrupt handler. 15/// Interrupt handler.
16pub struct InterruptHandler {} 16pub struct InterruptHandler {}
17 17
18impl interrupt::Handler<interrupt::ETH> for InterruptHandler { 18impl interrupt::typelevel::Handler<interrupt::typelevel::ETH> for InterruptHandler {
19 unsafe fn on_interrupt() { 19 unsafe fn on_interrupt() {
20 WAKER.wake(); 20 WAKER.wake();
21 21
@@ -64,7 +64,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
64 pub fn new<const TX: usize, const RX: usize>( 64 pub fn new<const TX: usize, const RX: usize>(
65 queue: &'d mut PacketQueue<TX, RX>, 65 queue: &'d mut PacketQueue<TX, RX>,
66 peri: impl Peripheral<P = T> + 'd, 66 peri: impl Peripheral<P = T> + 'd,
67 _irq: impl interrupt::Binding<interrupt::ETH, InterruptHandler> + 'd, 67 _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::ETH, InterruptHandler> + 'd,
68 ref_clk: impl Peripheral<P = impl RefClkPin<T>> + 'd, 68 ref_clk: impl Peripheral<P = impl RefClkPin<T>> + 'd,
69 mdio: impl Peripheral<P = impl MDIOPin<T>> + 'd, 69 mdio: impl Peripheral<P = impl MDIOPin<T>> + 'd,
70 mdc: impl Peripheral<P = impl MDCPin<T>> + 'd, 70 mdc: impl Peripheral<P = impl MDCPin<T>> + 'd,
@@ -238,8 +238,8 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
238 P::phy_reset(&mut this); 238 P::phy_reset(&mut this);
239 P::phy_init(&mut this); 239 P::phy_init(&mut this);
240 240
241 interrupt::ETH::unpend(); 241 interrupt::ETH.unpend();
242 interrupt::ETH::enable(); 242 interrupt::ETH.enable();
243 243
244 this 244 this
245 } 245 }
diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs
index c2fa31b20..a2ed07093 100644
--- a/embassy-stm32/src/exti.rs
+++ b/embassy-stm32/src/exti.rs
@@ -354,13 +354,13 @@ impl_exti!(EXTI15, 15);
354 354
355macro_rules! enable_irq { 355macro_rules! enable_irq {
356 ($e:ident) => { 356 ($e:ident) => {
357 crate::interrupt::$e::enable(); 357 crate::interrupt::typelevel::$e::enable();
358 }; 358 };
359} 359}
360 360
361/// safety: must be called only once 361/// safety: must be called only once
362pub(crate) unsafe fn init() { 362pub(crate) unsafe fn init() {
363 use crate::interrupt::Interrupt; 363 use crate::interrupt::typelevel::Interrupt;
364 364
365 foreach_exti_irq!(enable_irq); 365 foreach_exti_irq!(enable_irq);
366 366
diff --git a/embassy-stm32/src/flash/asynch.rs b/embassy-stm32/src/flash/asynch.rs
index 872614d4e..70a5ded62 100644
--- a/embassy-stm32/src/flash/asynch.rs
+++ b/embassy-stm32/src/flash/asynch.rs
@@ -1,7 +1,6 @@
1use core::marker::PhantomData; 1use core::marker::PhantomData;
2 2
3use atomic_polyfill::{fence, Ordering}; 3use atomic_polyfill::{fence, Ordering};
4use embassy_cortex_m::interrupt::Interrupt;
5use embassy_hal_common::drop::OnDrop; 4use embassy_hal_common::drop::OnDrop;
6use embassy_hal_common::into_ref; 5use embassy_hal_common::into_ref;
7use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; 6use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
@@ -11,6 +10,7 @@ use super::{
11 blocking_read, ensure_sector_aligned, family, get_sector, Async, Error, Flash, FlashLayout, FLASH_BASE, FLASH_SIZE, 10 blocking_read, ensure_sector_aligned, family, get_sector, Async, Error, Flash, FlashLayout, FLASH_BASE, FLASH_SIZE,
12 WRITE_SIZE, 11 WRITE_SIZE,
13}; 12};
13use crate::interrupt::InterruptExt;
14use crate::peripherals::FLASH; 14use crate::peripherals::FLASH;
15use crate::{interrupt, Peripheral}; 15use crate::{interrupt, Peripheral};
16 16
@@ -19,12 +19,12 @@ pub(super) static REGION_ACCESS: Mutex<CriticalSectionRawMutex, ()> = Mutex::new
19impl<'d> Flash<'d, Async> { 19impl<'d> Flash<'d, Async> {
20 pub fn new( 20 pub fn new(
21 p: impl Peripheral<P = FLASH> + 'd, 21 p: impl Peripheral<P = FLASH> + 'd,
22 _irq: impl interrupt::Binding<crate::interrupt::FLASH, InterruptHandler> + 'd, 22 _irq: impl interrupt::typelevel::Binding<crate::interrupt::typelevel::FLASH, InterruptHandler> + 'd,
23 ) -> Self { 23 ) -> Self {
24 into_ref!(p); 24 into_ref!(p);
25 25
26 crate::interrupt::FLASH::unpend(); 26 crate::interrupt::FLASH.unpend();
27 unsafe { crate::interrupt::FLASH::enable() }; 27 unsafe { crate::interrupt::FLASH.enable() };
28 28
29 Self { 29 Self {
30 inner: p, 30 inner: p,
@@ -49,7 +49,7 @@ impl<'d> Flash<'d, Async> {
49/// Interrupt handler 49/// Interrupt handler
50pub struct InterruptHandler; 50pub struct InterruptHandler;
51 51
52impl interrupt::Handler<crate::interrupt::FLASH> for InterruptHandler { 52impl interrupt::typelevel::Handler<crate::interrupt::typelevel::FLASH> for InterruptHandler {
53 unsafe fn on_interrupt() { 53 unsafe fn on_interrupt() {
54 family::on_interrupt(); 54 family::on_interrupt();
55 } 55 }
diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs
index f898fcc8b..b35678ed9 100644
--- a/embassy-stm32/src/i2c/mod.rs
+++ b/embassy-stm32/src/i2c/mod.rs
@@ -1,6 +1,6 @@
1#![macro_use] 1#![macro_use]
2 2
3use crate::interrupt::Interrupt; 3use crate::interrupt;
4 4
5#[cfg_attr(i2c_v1, path = "v1.rs")] 5#[cfg_attr(i2c_v1, path = "v1.rs")]
6#[cfg_attr(i2c_v2, path = "v2.rs")] 6#[cfg_attr(i2c_v2, path = "v2.rs")]
@@ -35,7 +35,7 @@ pub(crate) mod sealed {
35} 35}
36 36
37pub trait Instance: sealed::Instance + 'static { 37pub trait Instance: sealed::Instance + 'static {
38 type Interrupt: Interrupt; 38 type Interrupt: interrupt::typelevel::Interrupt;
39} 39}
40 40
41pin_trait!(SclPin, Instance); 41pin_trait!(SclPin, Instance);
@@ -57,7 +57,7 @@ foreach_interrupt!(
57 } 57 }
58 58
59 impl Instance for peripherals::$inst { 59 impl Instance for peripherals::$inst {
60 type Interrupt = crate::interrupt::$irq; 60 type Interrupt = crate::interrupt::typelevel::$irq;
61 } 61 }
62 }; 62 };
63); 63);
diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs
index b9be2e587..e04038886 100644
--- a/embassy-stm32/src/i2c/v1.rs
+++ b/embassy-stm32/src/i2c/v1.rs
@@ -16,7 +16,7 @@ pub struct InterruptHandler<T: Instance> {
16 _phantom: PhantomData<T>, 16 _phantom: PhantomData<T>,
17} 17}
18 18
19impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 19impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
20 unsafe fn on_interrupt() {} 20 unsafe fn on_interrupt() {}
21} 21}
22 22
@@ -57,7 +57,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
57 _peri: impl Peripheral<P = T> + 'd, 57 _peri: impl Peripheral<P = T> + 'd,
58 scl: impl Peripheral<P = impl SclPin<T>> + 'd, 58 scl: impl Peripheral<P = impl SclPin<T>> + 'd,
59 sda: impl Peripheral<P = impl SdaPin<T>> + 'd, 59 sda: impl Peripheral<P = impl SdaPin<T>> + 'd,
60 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 60 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
61 tx_dma: impl Peripheral<P = TXDMA> + 'd, 61 tx_dma: impl Peripheral<P = TXDMA> + 'd,
62 rx_dma: impl Peripheral<P = RXDMA> + 'd, 62 rx_dma: impl Peripheral<P = RXDMA> + 'd,
63 freq: Hertz, 63 freq: Hertz,
diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
index 10f57f700..1aaf2b46b 100644
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@@ -3,7 +3,6 @@ use core::future::poll_fn;
3use core::marker::PhantomData; 3use core::marker::PhantomData;
4use core::task::Poll; 4use core::task::Poll;
5 5
6use embassy_cortex_m::interrupt::Interrupt;
7use embassy_embedded_hal::SetConfig; 6use embassy_embedded_hal::SetConfig;
8use embassy_hal_common::drop::OnDrop; 7use embassy_hal_common::drop::OnDrop;
9use embassy_hal_common::{into_ref, PeripheralRef}; 8use embassy_hal_common::{into_ref, PeripheralRef};
@@ -13,6 +12,7 @@ use crate::dma::{NoDma, Transfer};
13use crate::gpio::sealed::AFType; 12use crate::gpio::sealed::AFType;
14use crate::gpio::Pull; 13use crate::gpio::Pull;
15use crate::i2c::{Error, Instance, SclPin, SdaPin}; 14use crate::i2c::{Error, Instance, SclPin, SdaPin};
15use crate::interrupt::typelevel::Interrupt;
16use crate::pac::i2c; 16use crate::pac::i2c;
17use crate::time::Hertz; 17use crate::time::Hertz;
18use crate::{interrupt, Peripheral}; 18use crate::{interrupt, Peripheral};
@@ -22,7 +22,7 @@ pub struct InterruptHandler<T: Instance> {
22 _phantom: PhantomData<T>, 22 _phantom: PhantomData<T>,
23} 23}
24 24
25impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 25impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
26 unsafe fn on_interrupt() { 26 unsafe fn on_interrupt() {
27 let regs = T::regs(); 27 let regs = T::regs();
28 let isr = regs.isr().read(); 28 let isr = regs.isr().read();
@@ -78,7 +78,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
78 peri: impl Peripheral<P = T> + 'd, 78 peri: impl Peripheral<P = T> + 'd,
79 scl: impl Peripheral<P = impl SclPin<T>> + 'd, 79 scl: impl Peripheral<P = impl SclPin<T>> + 'd,
80 sda: impl Peripheral<P = impl SdaPin<T>> + 'd, 80 sda: impl Peripheral<P = impl SdaPin<T>> + 'd,
81 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 81 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
82 tx_dma: impl Peripheral<P = TXDMA> + 'd, 82 tx_dma: impl Peripheral<P = TXDMA> + 'd,
83 rx_dma: impl Peripheral<P = RXDMA> + 'd, 83 rx_dma: impl Peripheral<P = RXDMA> + 'd,
84 freq: Hertz, 84 freq: Hertz,
diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs
index 75d8af3dd..b42864567 100644
--- a/embassy-stm32/src/lib.rs
+++ b/embassy-stm32/src/lib.rs
@@ -72,46 +72,39 @@ pub(crate) mod _generated {
72 include!(concat!(env!("OUT_DIR"), "/_generated.rs")); 72 include!(concat!(env!("OUT_DIR"), "/_generated.rs"));
73} 73}
74 74
75pub mod interrupt { 75pub use crate::_generated::interrupt;
76 //! Interrupt definitions and macros to bind them. 76
77 pub use cortex_m::interrupt::{CriticalSection, Mutex}; 77/// Macro to bind interrupts to handlers.
78 pub use embassy_cortex_m::interrupt::{Binding, Handler, Interrupt, Priority}; 78///
79 79/// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`)
80 pub use crate::_generated::interrupt::*; 80/// and implements the right [`Binding`]s for it. You can pass this struct to drivers to
81 81/// prove at compile-time that the right interrupts have been bound.
82 /// Macro to bind interrupts to handlers. 82// developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`.
83 /// 83#[macro_export]
84 /// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`) 84macro_rules! bind_interrupts {
85 /// and implements the right [`Binding`]s for it. You can pass this struct to drivers to 85 ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => {
86 /// prove at compile-time that the right interrupts have been bound. 86 $vis struct $name;
87 // developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`. 87
88 #[macro_export] 88 $(
89 macro_rules! bind_interrupts { 89 #[allow(non_snake_case)]
90 ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => { 90 #[no_mangle]
91 $vis struct $name; 91 unsafe extern "C" fn $irq() {
92
93 $(
94 #[allow(non_snake_case)]
95 #[no_mangle]
96 unsafe extern "C" fn $irq() {
97 $(
98 <$handler as $crate::interrupt::Handler<$crate::interrupt::$irq>>::on_interrupt();
99 )*
100 }
101
102 $( 92 $(
103 unsafe impl $crate::interrupt::Binding<$crate::interrupt::$irq, $handler> for $name {} 93 <$handler as $crate::interrupt::typelevel::Handler<$crate::interrupt::typelevel::$irq>>::on_interrupt();
104 )* 94 )*
95 }
96
97 $(
98 unsafe impl $crate::interrupt::typelevel::Binding<$crate::interrupt::typelevel::$irq, $handler> for $name {}
105 )* 99 )*
106 }; 100 )*
107 } 101 };
108} 102}
109 103
110// Reexports 104// Reexports
111pub use _generated::{peripherals, Peripherals}; 105pub use _generated::{peripherals, Peripherals};
112pub use embassy_cortex_m::executor; 106pub use embassy_cortex_m::executor;
113use embassy_cortex_m::interrupt::Priority; 107use embassy_cortex_m::interrupt::Priority;
114pub use embassy_cortex_m::interrupt::_export::interrupt;
115pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; 108pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
116#[cfg(feature = "unstable-pac")] 109#[cfg(feature = "unstable-pac")]
117pub use stm32_metapac as pac; 110pub use stm32_metapac as pac;
diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs
index 3cc17aa68..28eb49ab6 100644
--- a/embassy-stm32/src/sdmmc/mod.rs
+++ b/embassy-stm32/src/sdmmc/mod.rs
@@ -14,7 +14,7 @@ use sdio_host::{BusWidth, CardCapacity, CardStatus, CurrentState, SDStatus, CID,
14use crate::dma::NoDma; 14use crate::dma::NoDma;
15use crate::gpio::sealed::{AFType, Pin}; 15use crate::gpio::sealed::{AFType, Pin};
16use crate::gpio::{AnyPin, Pull, Speed}; 16use crate::gpio::{AnyPin, Pull, Speed};
17use crate::interrupt::Interrupt; 17use crate::interrupt::typelevel::Interrupt;
18use crate::pac::sdmmc::Sdmmc as RegBlock; 18use crate::pac::sdmmc::Sdmmc as RegBlock;
19use crate::rcc::RccPeripheral; 19use crate::rcc::RccPeripheral;
20use crate::time::Hertz; 20use crate::time::Hertz;
@@ -42,7 +42,7 @@ impl<T: Instance> InterruptHandler<T> {
42 } 42 }
43} 43}
44 44
45impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 45impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
46 unsafe fn on_interrupt() { 46 unsafe fn on_interrupt() {
47 Self::data_interrupts(false); 47 Self::data_interrupts(false);
48 T::state().wake(); 48 T::state().wake();
@@ -276,7 +276,7 @@ pub struct Sdmmc<'d, T: Instance, Dma: SdmmcDma<T> = NoDma> {
276impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> { 276impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
277 pub fn new_1bit( 277 pub fn new_1bit(
278 sdmmc: impl Peripheral<P = T> + 'd, 278 sdmmc: impl Peripheral<P = T> + 'd,
279 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 279 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
280 dma: impl Peripheral<P = Dma> + 'd, 280 dma: impl Peripheral<P = Dma> + 'd,
281 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 281 clk: impl Peripheral<P = impl CkPin<T>> + 'd,
282 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 282 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd,
@@ -310,7 +310,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
310 310
311 pub fn new_4bit( 311 pub fn new_4bit(
312 sdmmc: impl Peripheral<P = T> + 'd, 312 sdmmc: impl Peripheral<P = T> + 'd,
313 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 313 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
314 dma: impl Peripheral<P = Dma> + 'd, 314 dma: impl Peripheral<P = Dma> + 'd,
315 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 315 clk: impl Peripheral<P = impl CkPin<T>> + 'd,
316 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 316 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd,
@@ -356,7 +356,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
356impl<'d, T: Instance> Sdmmc<'d, T, NoDma> { 356impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
357 pub fn new_1bit( 357 pub fn new_1bit(
358 sdmmc: impl Peripheral<P = T> + 'd, 358 sdmmc: impl Peripheral<P = T> + 'd,
359 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 359 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
360 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 360 clk: impl Peripheral<P = impl CkPin<T>> + 'd,
361 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 361 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd,
362 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 362 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
@@ -389,7 +389,7 @@ impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
389 389
390 pub fn new_4bit( 390 pub fn new_4bit(
391 sdmmc: impl Peripheral<P = T> + 'd, 391 sdmmc: impl Peripheral<P = T> + 'd,
392 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 392 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
393 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 393 clk: impl Peripheral<P = impl CkPin<T>> + 'd,
394 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 394 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd,
395 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 395 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
@@ -1401,7 +1401,7 @@ pub(crate) mod sealed {
1401 use super::*; 1401 use super::*;
1402 1402
1403 pub trait Instance { 1403 pub trait Instance {
1404 type Interrupt: Interrupt; 1404 type Interrupt: interrupt::typelevel::Interrupt;
1405 1405
1406 fn regs() -> RegBlock; 1406 fn regs() -> RegBlock;
1407 fn state() -> &'static AtomicWaker; 1407 fn state() -> &'static AtomicWaker;
@@ -1490,7 +1490,7 @@ cfg_if::cfg_if! {
1490foreach_peripheral!( 1490foreach_peripheral!(
1491 (sdmmc, $inst:ident) => { 1491 (sdmmc, $inst:ident) => {
1492 impl sealed::Instance for peripherals::$inst { 1492 impl sealed::Instance for peripherals::$inst {
1493 type Interrupt = crate::interrupt::$inst; 1493 type Interrupt = crate::interrupt::typelevel::$inst;
1494 1494
1495 fn regs() -> RegBlock { 1495 fn regs() -> RegBlock {
1496 crate::pac::$inst 1496 crate::pac::$inst
diff --git a/embassy-stm32/src/time_driver.rs b/embassy-stm32/src/time_driver.rs
index bab700993..8f282bafb 100644
--- a/embassy-stm32/src/time_driver.rs
+++ b/embassy-stm32/src/time_driver.rs
@@ -11,7 +11,7 @@ use embassy_time::driver::{AlarmHandle, Driver};
11use embassy_time::TICK_HZ; 11use embassy_time::TICK_HZ;
12use stm32_metapac::timer::regs; 12use stm32_metapac::timer::regs;
13 13
14use crate::interrupt::Interrupt; 14use crate::interrupt::typelevel::Interrupt;
15use crate::pac::timer::vals; 15use crate::pac::timer::vals;
16use crate::rcc::sealed::RccPeripheral; 16use crate::rcc::sealed::RccPeripheral;
17use crate::timer::sealed::{Basic16bitInstance as BasicInstance, GeneralPurpose16bitInstance as Instance}; 17use crate::timer::sealed::{Basic16bitInstance as BasicInstance, GeneralPurpose16bitInstance as Instance};
diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs
index 772c67686..14db97024 100644
--- a/embassy-stm32/src/timer/mod.rs
+++ b/embassy-stm32/src/timer/mod.rs
@@ -1,6 +1,6 @@
1use stm32_metapac::timer::vals; 1use stm32_metapac::timer::vals;
2 2
3use crate::interrupt::Interrupt; 3use crate::interrupt;
4use crate::rcc::sealed::RccPeripheral as __RccPeri; 4use crate::rcc::sealed::RccPeripheral as __RccPeri;
5use crate::rcc::RccPeripheral; 5use crate::rcc::RccPeripheral;
6use crate::time::Hertz; 6use crate::time::Hertz;
@@ -13,7 +13,7 @@ pub mod low_level {
13pub(crate) mod sealed { 13pub(crate) mod sealed {
14 use super::*; 14 use super::*;
15 pub trait Basic16bitInstance: RccPeripheral { 15 pub trait Basic16bitInstance: RccPeripheral {
16 type Interrupt: Interrupt; 16 type Interrupt: interrupt::typelevel::Interrupt;
17 17
18 fn regs() -> crate::pac::timer::TimBasic; 18 fn regs() -> crate::pac::timer::TimBasic;
19 19
@@ -57,7 +57,7 @@ pub trait Basic16bitInstance: sealed::Basic16bitInstance + 'static {}
57macro_rules! impl_basic_16bit_timer { 57macro_rules! impl_basic_16bit_timer {
58 ($inst:ident, $irq:ident) => { 58 ($inst:ident, $irq:ident) => {
59 impl sealed::Basic16bitInstance for crate::peripherals::$inst { 59 impl sealed::Basic16bitInstance for crate::peripherals::$inst {
60 type Interrupt = crate::interrupt::$irq; 60 type Interrupt = crate::interrupt::typelevel::$irq;
61 61
62 fn regs() -> crate::pac::timer::TimBasic { 62 fn regs() -> crate::pac::timer::TimBasic {
63 crate::pac::timer::TimBasic(crate::pac::$inst.0) 63 crate::pac::timer::TimBasic(crate::pac::$inst.0)
diff --git a/embassy-stm32/src/tl_mbox/mod.rs b/embassy-stm32/src/tl_mbox/mod.rs
index efbbf2d1d..d39c78b2c 100644
--- a/embassy-stm32/src/tl_mbox/mod.rs
+++ b/embassy-stm32/src/tl_mbox/mod.rs
@@ -2,7 +2,6 @@ use core::mem::MaybeUninit;
2 2
3use atomic_polyfill::{compiler_fence, Ordering}; 3use atomic_polyfill::{compiler_fence, Ordering};
4use bit_field::BitField; 4use bit_field::BitField;
5use embassy_cortex_m::interrupt::Interrupt;
6use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; 5use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
7use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; 6use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
8use embassy_sync::channel::Channel; 7use embassy_sync::channel::Channel;
@@ -15,6 +14,7 @@ use self::shci::{shci_ble_init, ShciBleInitCmdParam};
15use self::sys::Sys; 14use self::sys::Sys;
16use self::unsafe_linked_list::LinkedListNode; 15use self::unsafe_linked_list::LinkedListNode;
17use crate::interrupt; 16use crate::interrupt;
17use crate::interrupt::InterruptExt;
18use crate::peripherals::IPCC; 18use crate::peripherals::IPCC;
19pub use crate::tl_mbox::ipcc::Config; 19pub use crate::tl_mbox::ipcc::Config;
20use crate::tl_mbox::ipcc::Ipcc; 20use crate::tl_mbox::ipcc::Ipcc;
@@ -63,7 +63,7 @@ pub struct FusInfoTable {
63/// Interrupt handler. 63/// Interrupt handler.
64pub struct ReceiveInterruptHandler {} 64pub struct ReceiveInterruptHandler {}
65 65
66impl interrupt::Handler<interrupt::IPCC_C1_RX> for ReceiveInterruptHandler { 66impl interrupt::typelevel::Handler<interrupt::typelevel::IPCC_C1_RX> for ReceiveInterruptHandler {
67 unsafe fn on_interrupt() { 67 unsafe fn on_interrupt() {
68 // info!("ipcc rx interrupt"); 68 // info!("ipcc rx interrupt");
69 69
@@ -79,7 +79,7 @@ impl interrupt::Handler<interrupt::IPCC_C1_RX> for ReceiveInterruptHandler {
79 79
80pub struct TransmitInterruptHandler {} 80pub struct TransmitInterruptHandler {}
81 81
82impl interrupt::Handler<interrupt::IPCC_C1_TX> for TransmitInterruptHandler { 82impl interrupt::typelevel::Handler<interrupt::typelevel::IPCC_C1_TX> for TransmitInterruptHandler {
83 unsafe fn on_interrupt() { 83 unsafe fn on_interrupt() {
84 // info!("ipcc tx interrupt"); 84 // info!("ipcc tx interrupt");
85 85
@@ -324,8 +324,8 @@ impl<'d> TlMbox<'d> {
324 /// initializes low-level transport between CPU1 and BLE stack on CPU2 324 /// initializes low-level transport between CPU1 and BLE stack on CPU2
325 pub fn new( 325 pub fn new(
326 ipcc: impl Peripheral<P = IPCC> + 'd, 326 ipcc: impl Peripheral<P = IPCC> + 'd,
327 _irqs: impl interrupt::Binding<interrupt::IPCC_C1_RX, ReceiveInterruptHandler> 327 _irqs: impl interrupt::typelevel::Binding<interrupt::typelevel::IPCC_C1_RX, ReceiveInterruptHandler>
328 + interrupt::Binding<interrupt::IPCC_C1_TX, TransmitInterruptHandler>, 328 + interrupt::typelevel::Binding<interrupt::typelevel::IPCC_C1_TX, TransmitInterruptHandler>,
329 config: Config, 329 config: Config,
330 ) -> Self { 330 ) -> Self {
331 into_ref!(ipcc); 331 into_ref!(ipcc);
@@ -379,11 +379,11 @@ impl<'d> TlMbox<'d> {
379 MemoryManager::enable(); 379 MemoryManager::enable();
380 380
381 // enable interrupts 381 // enable interrupts
382 crate::interrupt::IPCC_C1_RX::unpend(); 382 crate::interrupt::IPCC_C1_RX.unpend();
383 crate::interrupt::IPCC_C1_TX::unpend(); 383 crate::interrupt::IPCC_C1_TX.unpend();
384 384
385 unsafe { crate::interrupt::IPCC_C1_RX::enable() }; 385 unsafe { crate::interrupt::IPCC_C1_RX.enable() };
386 unsafe { crate::interrupt::IPCC_C1_TX::enable() }; 386 unsafe { crate::interrupt::IPCC_C1_TX.enable() };
387 387
388 Self { _ipcc: ipcc } 388 Self { _ipcc: ipcc }
389 } 389 }
diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs
index 252e945da..613da5674 100644
--- a/embassy-stm32/src/usart/buffered.rs
+++ b/embassy-stm32/src/usart/buffered.rs
@@ -2,18 +2,18 @@ use core::future::poll_fn;
2use core::slice; 2use core::slice;
3use core::task::Poll; 3use core::task::Poll;
4 4
5use embassy_cortex_m::interrupt::Interrupt;
6use embassy_hal_common::atomic_ring_buffer::RingBuffer; 5use embassy_hal_common::atomic_ring_buffer::RingBuffer;
7use embassy_sync::waitqueue::AtomicWaker; 6use embassy_sync::waitqueue::AtomicWaker;
8 7
9use super::*; 8use super::*;
9use crate::interrupt::typelevel::Interrupt;
10 10
11/// Interrupt handler. 11/// Interrupt handler.
12pub struct InterruptHandler<T: BasicInstance> { 12pub struct InterruptHandler<T: BasicInstance> {
13 _phantom: PhantomData<T>, 13 _phantom: PhantomData<T>,
14} 14}
15 15
16impl<T: BasicInstance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 16impl<T: BasicInstance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
17 unsafe fn on_interrupt() { 17 unsafe fn on_interrupt() {
18 let r = T::regs(); 18 let r = T::regs();
19 let state = T::buffered_state(); 19 let state = T::buffered_state();
@@ -115,7 +115,7 @@ pub struct BufferedUartRx<'d, T: BasicInstance> {
115impl<'d, T: BasicInstance> BufferedUart<'d, T> { 115impl<'d, T: BasicInstance> BufferedUart<'d, T> {
116 pub fn new( 116 pub fn new(
117 peri: impl Peripheral<P = T> + 'd, 117 peri: impl Peripheral<P = T> + 'd,
118 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 118 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
119 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 119 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
120 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 120 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
121 tx_buffer: &'d mut [u8], 121 tx_buffer: &'d mut [u8],
@@ -130,7 +130,7 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
130 130
131 pub fn new_with_rtscts( 131 pub fn new_with_rtscts(
132 peri: impl Peripheral<P = T> + 'd, 132 peri: impl Peripheral<P = T> + 'd,
133 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 133 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
134 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 134 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
135 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 135 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
136 rts: impl Peripheral<P = impl RtsPin<T>> + 'd, 136 rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
@@ -159,7 +159,7 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
159 #[cfg(not(any(usart_v1, usart_v2)))] 159 #[cfg(not(any(usart_v1, usart_v2)))]
160 pub fn new_with_de( 160 pub fn new_with_de(
161 peri: impl Peripheral<P = T> + 'd, 161 peri: impl Peripheral<P = T> + 'd,
162 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 162 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
163 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 163 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
164 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 164 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
165 de: impl Peripheral<P = impl DePin<T>> + 'd, 165 de: impl Peripheral<P = impl DePin<T>> + 'd,
diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs
index ef1080153..da3644a81 100644
--- a/embassy-stm32/src/usart/mod.rs
+++ b/embassy-stm32/src/usart/mod.rs
@@ -5,13 +5,13 @@ use core::marker::PhantomData;
5use core::sync::atomic::{compiler_fence, Ordering}; 5use core::sync::atomic::{compiler_fence, Ordering};
6use core::task::Poll; 6use core::task::Poll;
7 7
8use embassy_cortex_m::interrupt::Interrupt;
9use embassy_hal_common::drop::OnDrop; 8use embassy_hal_common::drop::OnDrop;
10use embassy_hal_common::{into_ref, PeripheralRef}; 9use embassy_hal_common::{into_ref, PeripheralRef};
11use futures::future::{select, Either}; 10use futures::future::{select, Either};
12 11
13use crate::dma::{NoDma, Transfer}; 12use crate::dma::{NoDma, Transfer};
14use crate::gpio::sealed::AFType; 13use crate::gpio::sealed::AFType;
14use crate::interrupt::typelevel::Interrupt;
15#[cfg(not(any(usart_v1, usart_v2)))] 15#[cfg(not(any(usart_v1, usart_v2)))]
16#[allow(unused_imports)] 16#[allow(unused_imports)]
17use crate::pac::usart::regs::Isr as Sr; 17use crate::pac::usart::regs::Isr as Sr;
@@ -31,7 +31,7 @@ pub struct InterruptHandler<T: BasicInstance> {
31 _phantom: PhantomData<T>, 31 _phantom: PhantomData<T>,
32} 32}
33 33
34impl<T: BasicInstance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 34impl<T: BasicInstance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
35 unsafe fn on_interrupt() { 35 unsafe fn on_interrupt() {
36 let r = T::regs(); 36 let r = T::regs();
37 let s = T::state(); 37 let s = T::state();
@@ -281,7 +281,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
281 /// Useful if you only want Uart Rx. It saves 1 pin and consumes a little less power. 281 /// Useful if you only want Uart Rx. It saves 1 pin and consumes a little less power.
282 pub fn new( 282 pub fn new(
283 peri: impl Peripheral<P = T> + 'd, 283 peri: impl Peripheral<P = T> + 'd,
284 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 284 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
285 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 285 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
286 rx_dma: impl Peripheral<P = RxDma> + 'd, 286 rx_dma: impl Peripheral<P = RxDma> + 'd,
287 config: Config, 287 config: Config,
@@ -294,7 +294,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
294 294
295 pub fn new_with_rts( 295 pub fn new_with_rts(
296 peri: impl Peripheral<P = T> + 'd, 296 peri: impl Peripheral<P = T> + 'd,
297 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 297 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
298 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 298 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
299 rts: impl Peripheral<P = impl RtsPin<T>> + 'd, 299 rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
300 rx_dma: impl Peripheral<P = RxDma> + 'd, 300 rx_dma: impl Peripheral<P = RxDma> + 'd,
@@ -650,7 +650,7 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
650 peri: impl Peripheral<P = T> + 'd, 650 peri: impl Peripheral<P = T> + 'd,
651 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 651 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
652 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 652 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
653 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 653 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
654 tx_dma: impl Peripheral<P = TxDma> + 'd, 654 tx_dma: impl Peripheral<P = TxDma> + 'd,
655 rx_dma: impl Peripheral<P = RxDma> + 'd, 655 rx_dma: impl Peripheral<P = RxDma> + 'd,
656 config: Config, 656 config: Config,
@@ -665,7 +665,7 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
665 peri: impl Peripheral<P = T> + 'd, 665 peri: impl Peripheral<P = T> + 'd,
666 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 666 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
667 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 667 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
668 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 668 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
669 rts: impl Peripheral<P = impl RtsPin<T>> + 'd, 669 rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
670 cts: impl Peripheral<P = impl CtsPin<T>> + 'd, 670 cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
671 tx_dma: impl Peripheral<P = TxDma> + 'd, 671 tx_dma: impl Peripheral<P = TxDma> + 'd,
@@ -693,7 +693,7 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
693 peri: impl Peripheral<P = T> + 'd, 693 peri: impl Peripheral<P = T> + 'd,
694 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 694 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
695 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 695 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
696 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 696 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
697 de: impl Peripheral<P = impl DePin<T>> + 'd, 697 de: impl Peripheral<P = impl DePin<T>> + 'd,
698 tx_dma: impl Peripheral<P = TxDma> + 'd, 698 tx_dma: impl Peripheral<P = TxDma> + 'd,
699 rx_dma: impl Peripheral<P = RxDma> + 'd, 699 rx_dma: impl Peripheral<P = RxDma> + 'd,
@@ -1179,7 +1179,7 @@ pub(crate) mod sealed {
1179 1179
1180 pub trait BasicInstance: crate::rcc::RccPeripheral { 1180 pub trait BasicInstance: crate::rcc::RccPeripheral {
1181 const KIND: Kind; 1181 const KIND: Kind;
1182 type Interrupt: crate::interrupt::Interrupt; 1182 type Interrupt: interrupt::typelevel::Interrupt;
1183 1183
1184 fn regs() -> Regs; 1184 fn regs() -> Regs;
1185 fn state() -> &'static State; 1185 fn state() -> &'static State;
@@ -1211,7 +1211,7 @@ macro_rules! impl_usart {
1211 ($inst:ident, $irq:ident, $kind:expr) => { 1211 ($inst:ident, $irq:ident, $kind:expr) => {
1212 impl sealed::BasicInstance for crate::peripherals::$inst { 1212 impl sealed::BasicInstance for crate::peripherals::$inst {
1213 const KIND: Kind = $kind; 1213 const KIND: Kind = $kind;
1214 type Interrupt = crate::interrupt::$irq; 1214 type Interrupt = crate::interrupt::typelevel::$irq;
1215 1215
1216 fn regs() -> Regs { 1216 fn regs() -> Regs {
1217 Regs(crate::pac::$inst.0) 1217 Regs(crate::pac::$inst.0)
diff --git a/embassy-stm32/src/usb/mod.rs b/embassy-stm32/src/usb/mod.rs
index fbd1fa823..bee287fe6 100644
--- a/embassy-stm32/src/usb/mod.rs
+++ b/embassy-stm32/src/usb/mod.rs
@@ -1,4 +1,4 @@
1use crate::interrupt::Interrupt; 1use crate::interrupt;
2use crate::rcc::RccPeripheral; 2use crate::rcc::RccPeripheral;
3 3
4#[cfg(feature = "nightly")] 4#[cfg(feature = "nightly")]
@@ -13,7 +13,7 @@ pub(crate) mod sealed {
13} 13}
14 14
15pub trait Instance: sealed::Instance + RccPeripheral + 'static { 15pub trait Instance: sealed::Instance + RccPeripheral + 'static {
16 type Interrupt: Interrupt; 16 type Interrupt: interrupt::typelevel::Interrupt;
17} 17}
18 18
19// Internal PHY pins 19// Internal PHY pins
@@ -29,7 +29,7 @@ foreach_interrupt!(
29 } 29 }
30 30
31 impl Instance for crate::peripherals::$inst { 31 impl Instance for crate::peripherals::$inst {
32 type Interrupt = crate::interrupt::$irq; 32 type Interrupt = crate::interrupt::typelevel::$irq;
33 } 33 }
34 }; 34 };
35); 35);
diff --git a/embassy-stm32/src/usb/usb.rs b/embassy-stm32/src/usb/usb.rs
index 134107978..7486bd376 100644
--- a/embassy-stm32/src/usb/usb.rs
+++ b/embassy-stm32/src/usb/usb.rs
@@ -14,7 +14,7 @@ use embassy_usb_driver::{
14 14
15use super::{DmPin, DpPin, Instance}; 15use super::{DmPin, DpPin, Instance};
16use crate::gpio::sealed::AFType; 16use crate::gpio::sealed::AFType;
17use crate::interrupt::Interrupt; 17use crate::interrupt::typelevel::Interrupt;
18use crate::pac::usb::regs; 18use crate::pac::usb::regs;
19use crate::pac::usb::vals::{EpType, Stat}; 19use crate::pac::usb::vals::{EpType, Stat};
20use crate::pac::USBRAM; 20use crate::pac::USBRAM;
@@ -26,7 +26,7 @@ pub struct InterruptHandler<T: Instance> {
26 _phantom: PhantomData<T>, 26 _phantom: PhantomData<T>,
27} 27}
28 28
29impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 29impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
30 unsafe fn on_interrupt() { 30 unsafe fn on_interrupt() {
31 unsafe { 31 unsafe {
32 let regs = T::regs(); 32 let regs = T::regs();
@@ -255,7 +255,7 @@ pub struct Driver<'d, T: Instance> {
255impl<'d, T: Instance> Driver<'d, T> { 255impl<'d, T: Instance> Driver<'d, T> {
256 pub fn new( 256 pub fn new(
257 _usb: impl Peripheral<P = T> + 'd, 257 _usb: impl Peripheral<P = T> + 'd,
258 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 258 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
259 dp: impl Peripheral<P = impl DpPin<T>> + 'd, 259 dp: impl Peripheral<P = impl DpPin<T>> + 'd,
260 dm: impl Peripheral<P = impl DmPin<T>> + 'd, 260 dm: impl Peripheral<P = impl DmPin<T>> + 'd,
261 ) -> Self { 261 ) -> Self {
diff --git a/embassy-stm32/src/usb_otg/mod.rs b/embassy-stm32/src/usb_otg/mod.rs
index 193e0df0d..317264cbb 100644
--- a/embassy-stm32/src/usb_otg/mod.rs
+++ b/embassy-stm32/src/usb_otg/mod.rs
@@ -1,7 +1,5 @@
1use embassy_cortex_m::interrupt::Interrupt;
2
3use crate::peripherals;
4use crate::rcc::RccPeripheral; 1use crate::rcc::RccPeripheral;
2use crate::{interrupt, peripherals};
5 3
6#[cfg(feature = "nightly")] 4#[cfg(feature = "nightly")]
7mod usb; 5mod usb;
@@ -25,7 +23,7 @@ pub(crate) mod sealed {
25} 23}
26 24
27pub trait Instance: sealed::Instance + RccPeripheral { 25pub trait Instance: sealed::Instance + RccPeripheral {
28 type Interrupt: Interrupt; 26 type Interrupt: interrupt::typelevel::Interrupt;
29} 27}
30 28
31// Internal PHY pins 29// Internal PHY pins
@@ -109,7 +107,7 @@ foreach_interrupt!(
109 } 107 }
110 108
111 impl Instance for peripherals::USB_OTG_FS { 109 impl Instance for peripherals::USB_OTG_FS {
112 type Interrupt = crate::interrupt::$irq; 110 type Interrupt = crate::interrupt::typelevel::$irq;
113 } 111 }
114 }; 112 };
115 113
@@ -161,7 +159,7 @@ foreach_interrupt!(
161 } 159 }
162 160
163 impl Instance for peripherals::USB_OTG_HS { 161 impl Instance for peripherals::USB_OTG_HS {
164 type Interrupt = crate::interrupt::$irq; 162 type Interrupt = crate::interrupt::typelevel::$irq;
165 } 163 }
166 }; 164 };
167); 165);
diff --git a/embassy-stm32/src/usb_otg/usb.rs b/embassy-stm32/src/usb_otg/usb.rs
index e602bcb70..16cbf1a95 100644
--- a/embassy-stm32/src/usb_otg/usb.rs
+++ b/embassy-stm32/src/usb_otg/usb.rs
@@ -3,7 +3,6 @@ use core::marker::PhantomData;
3use core::task::Poll; 3use core::task::Poll;
4 4
5use atomic_polyfill::{AtomicBool, AtomicU16, Ordering}; 5use atomic_polyfill::{AtomicBool, AtomicU16, Ordering};
6use embassy_cortex_m::interrupt::Interrupt;
7use embassy_hal_common::{into_ref, Peripheral}; 6use embassy_hal_common::{into_ref, Peripheral};
8use embassy_sync::waitqueue::AtomicWaker; 7use embassy_sync::waitqueue::AtomicWaker;
9use embassy_usb_driver::{ 8use embassy_usb_driver::{
@@ -15,6 +14,7 @@ use futures::future::poll_fn;
15use super::*; 14use super::*;
16use crate::gpio::sealed::AFType; 15use crate::gpio::sealed::AFType;
17use crate::interrupt; 16use crate::interrupt;
17use crate::interrupt::typelevel::Interrupt;
18use crate::pac::otg::{regs, vals}; 18use crate::pac::otg::{regs, vals};
19use crate::rcc::sealed::RccPeripheral; 19use crate::rcc::sealed::RccPeripheral;
20use crate::time::Hertz; 20use crate::time::Hertz;
@@ -24,7 +24,7 @@ pub struct InterruptHandler<T: Instance> {
24 _phantom: PhantomData<T>, 24 _phantom: PhantomData<T>,
25} 25}
26 26
27impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 27impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
28 unsafe fn on_interrupt() { 28 unsafe fn on_interrupt() {
29 trace!("irq"); 29 trace!("irq");
30 let r = T::regs(); 30 let r = T::regs();
@@ -291,7 +291,7 @@ impl<'d, T: Instance> Driver<'d, T> {
291 /// Endpoint allocation will fail if it is too small. 291 /// Endpoint allocation will fail if it is too small.
292 pub fn new_fs( 292 pub fn new_fs(
293 _peri: impl Peripheral<P = T> + 'd, 293 _peri: impl Peripheral<P = T> + 'd,
294 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 294 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
295 dp: impl Peripheral<P = impl DpPin<T>> + 'd, 295 dp: impl Peripheral<P = impl DpPin<T>> + 'd,
296 dm: impl Peripheral<P = impl DmPin<T>> + 'd, 296 dm: impl Peripheral<P = impl DmPin<T>> + 'd,
297 ep_out_buffer: &'d mut [u8], 297 ep_out_buffer: &'d mut [u8],
@@ -322,7 +322,7 @@ impl<'d, T: Instance> Driver<'d, T> {
322 /// Endpoint allocation will fail if it is too small. 322 /// Endpoint allocation will fail if it is too small.
323 pub fn new_hs_ulpi( 323 pub fn new_hs_ulpi(
324 _peri: impl Peripheral<P = T> + 'd, 324 _peri: impl Peripheral<P = T> + 'd,
325 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 325 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
326 ulpi_clk: impl Peripheral<P = impl UlpiClkPin<T>> + 'd, 326 ulpi_clk: impl Peripheral<P = impl UlpiClkPin<T>> + 'd,
327 ulpi_dir: impl Peripheral<P = impl UlpiDirPin<T>> + 'd, 327 ulpi_dir: impl Peripheral<P = impl UlpiDirPin<T>> + 'd,
328 ulpi_nxt: impl Peripheral<P = impl UlpiNxtPin<T>> + 'd, 328 ulpi_nxt: impl Peripheral<P = impl UlpiNxtPin<T>> + 'd,