adjusted for u0 as well

1 files changed, 2 insertions, 2 deletions

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index c032113d5..7b5df80b8 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -248,9 +248,9 @@ impl<'d, T: Instance> Adc<'d, T> {
             Averaging::Samples256 => (true, 7, 8),
         };
         T::regs().cfgr2().modify(|reg| {
-            #[cfg(not(adc_g0))]
+            #[cfg(not(any(adc_g0, adc_u0)))]
             reg.set_rovse(enable);
-            #[cfg(adc_g0)]
+            #[cfg(any(adc_g0, adc_u0))]
             reg.set_ovse(enable);
             #[cfg(any(adc_h5, adc_h7rs))]
             reg.set_ovsr(samples.into());