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authorFelipe Balbi <[email protected]>2025-11-13 13:17:44 -0800
committerGitHub <[email protected]>2025-11-13 13:17:44 -0800
commit77b2c602a60e41c7c977003a6d40367ac285930e (patch)
tree6a6490c883f84658c992af4351b8d8a8d8e1c1e4 /examples/src/bin/adc_interrupt.rs
parentf4b8ae36bec40a15bedd3c0493e4822f9c5238dd (diff)
Move examples to a package of their own (#16)
* Move examples to a package of their own * cargo +nightly fmt * Add missing safety doc * cargo clippy examples * fmt again --------- Co-authored-by: Felipe Balbi <[email protected]>
Diffstat (limited to 'examples/src/bin/adc_interrupt.rs')
-rw-r--r--examples/src/bin/adc_interrupt.rs86
1 files changed, 86 insertions, 0 deletions
diff --git a/examples/src/bin/adc_interrupt.rs b/examples/src/bin/adc_interrupt.rs
new file mode 100644
index 000000000..e174a5272
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+++ b/examples/src/bin/adc_interrupt.rs
@@ -0,0 +1,86 @@
1#![no_std]
2#![no_main]
3
4use embassy_executor::Spawner;
5use embassy_mcxa_examples::{init_adc, init_uart2};
6use hal::adc::{LpadcConfig, TriggerPriorityPolicy};
7use hal::pac::adc1::cfg::{Pwrsel, Refsel};
8use hal::pac::adc1::cmdl1::{Adch, Mode};
9use hal::pac::adc1::ctrl::CalAvgs;
10use hal::pac::adc1::tctrl::Tcmd;
11use hal::{bind_interrupts, uart, InterruptExt};
12use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
13
14bind_interrupts!(struct Irqs {
15 ADC1 => hal::adc::AdcHandler;
16});
17
18#[used]
19#[no_mangle]
20static KEEP_ADC: unsafe extern "C" fn() = ADC1;
21
22#[embassy_executor::main]
23async fn main(_spawner: Spawner) {
24 let p = hal::init(hal::config::Config::default());
25
26 unsafe {
27 init_uart2(hal::pac());
28 }
29
30 let src = unsafe { hal::clocks::uart2_src_hz(hal::pac()) };
31 let uart = uart::Uart::<uart::Lpuart2>::new(p.LPUART2, uart::Config::new(src));
32
33 uart.write_str_blocking("\r\n=== ADC interrupt Example ===\r\n");
34
35 unsafe {
36 init_adc(hal::pac());
37 }
38
39 let adc_config = LpadcConfig {
40 enable_in_doze_mode: true,
41 conversion_average_mode: CalAvgs::Average128,
42 enable_analog_preliminary: true,
43 power_up_delay: 0x80,
44 reference_voltage_source: Refsel::Option3,
45 power_level_mode: Pwrsel::Lowest,
46 trigger_priority_policy: TriggerPriorityPolicy::ConvPreemptImmediatelyNotAutoResumed,
47 enable_conv_pause: false,
48 conv_pause_delay: 0,
49 fifo_watermark: 0,
50 };
51 let adc = hal::adc::Adc::<hal::adc::Adc1>::new(p.ADC1, adc_config);
52
53 adc.do_offset_calibration();
54 adc.do_auto_calibration();
55
56 let mut conv_command_config = adc.get_default_conv_command_config();
57 conv_command_config.channel_number = Adch::SelectCorrespondingChannel8;
58 conv_command_config.conversion_resolution_mode = Mode::Data16Bits;
59 adc.set_conv_command_config(1, &conv_command_config);
60
61 let mut conv_trigger_config = adc.get_default_conv_trigger_config();
62 conv_trigger_config.target_command_id = Tcmd::ExecuteCmd1;
63 conv_trigger_config.enable_hardware_trigger = false;
64 adc.set_conv_trigger_config(0, &conv_trigger_config);
65
66 uart.write_str_blocking("\r\n=== ADC configuration done... ===\r\n");
67
68 adc.enable_interrupt(0x1);
69
70 unsafe {
71 hal::interrupt::ADC1.enable();
72 }
73
74 unsafe {
75 cortex_m::interrupt::enable();
76 }
77
78 loop {
79 adc.do_software_trigger(1);
80 while !adc.is_interrupt_triggered() {
81 // Wait until the interrupt is triggered
82 }
83 uart.write_str_blocking("\r\n*** ADC interrupt TRIGGERED! ***\r\n");
84 //TBD need to print the value
85 }
86}