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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2022-04-30 21:08:43 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2022-04-30 21:08:43 +0000 |
| commit | d600f392608ebebe97d1e7461789d0a724afc9ef (patch) | |
| tree | f57df320554eb534c7aba15e4d09e5929deb8e96 /examples/std/Cargo.toml | |
| parent | c474682ea97add6ae8d448e8472ee0444c3cc366 (diff) | |
| parent | e88559c5ca2450bbcfd6fe65e73fe0fe47465680 (diff) | |
Merge #743
743: Add PLL config support for F2 r=Dirbaio a=Gekkio
- minor changes to make the F2 RCC API a bit more flexible
- low-level PLL config with assertions based on datasheet specs. It shouldn't be very difficult to later add a "reverse API" where you pass the clocks you want to a function and it generates a `PLLConfig` struct for you
- PLL API tested on my custom board with 12 MHz HSE as source for PLL to generate max clocks for SYSCLK/AHB/APB/APB1/PLL48
- the example *should* work but is untested since I don't have the Nucleo board :disappointed:
Co-authored-by: Joonas Javanainen <[email protected]>
Diffstat (limited to 'examples/std/Cargo.toml')
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