diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-11-13 01:53:27 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-11-13 01:56:50 +0100 |
| commit | 2376b3bdfa573027c1ee4d66f8fdd6ca422a0fdd (patch) | |
| tree | 7f5159472bc75c53734dc2559ab9b0579a28af79 /examples/stm32f7/src | |
| parent | f00e97a5f14b25d261eafba7cbc63b035c938996 (diff) | |
stm32/rcc: fix pll enum naming on f4, f7.
Diffstat (limited to 'examples/stm32f7/src')
| -rw-r--r-- | examples/stm32f7/src/bin/eth.rs | 2 | ||||
| -rw-r--r-- | examples/stm32f7/src/bin/sdmmc.rs | 4 | ||||
| -rw-r--r-- | examples/stm32f7/src/bin/usb_serial.rs | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/examples/stm32f7/src/bin/eth.rs b/examples/stm32f7/src/bin/eth.rs index 7c6c419a6..dd0069447 100644 --- a/examples/stm32f7/src/bin/eth.rs +++ b/examples/stm32f7/src/bin/eth.rs | |||
| @@ -43,7 +43,7 @@ async fn main(spawner: Spawner) -> ! { | |||
| 43 | config.rcc.pll = Some(Pll { | 43 | config.rcc.pll = Some(Pll { |
| 44 | prediv: PllPreDiv::DIV4, | 44 | prediv: PllPreDiv::DIV4, |
| 45 | mul: PllMul::MUL216, | 45 | mul: PllMul::MUL216, |
| 46 | divp: Some(Pllp::DIV2), // 8mhz / 4 * 216 / 2 = 216Mhz | 46 | divp: Some(PllPDiv::DIV2), // 8mhz / 4 * 216 / 2 = 216Mhz |
| 47 | divq: None, | 47 | divq: None, |
| 48 | divr: None, | 48 | divr: None, |
| 49 | }); | 49 | }); |
diff --git a/examples/stm32f7/src/bin/sdmmc.rs b/examples/stm32f7/src/bin/sdmmc.rs index 430aa781f..990de0ab1 100644 --- a/examples/stm32f7/src/bin/sdmmc.rs +++ b/examples/stm32f7/src/bin/sdmmc.rs | |||
| @@ -26,8 +26,8 @@ async fn main(_spawner: Spawner) { | |||
| 26 | config.rcc.pll = Some(Pll { | 26 | config.rcc.pll = Some(Pll { |
| 27 | prediv: PllPreDiv::DIV4, | 27 | prediv: PllPreDiv::DIV4, |
| 28 | mul: PllMul::MUL216, | 28 | mul: PllMul::MUL216, |
| 29 | divp: Some(Pllp::DIV2), // 8mhz / 4 * 216 / 2 = 216Mhz | 29 | divp: Some(PllPDiv::DIV2), // 8mhz / 4 * 216 / 2 = 216Mhz |
| 30 | divq: Some(Pllq::DIV9), // 8mhz / 4 * 216 / 9 = 48Mhz | 30 | divq: Some(PllQDiv::DIV9), // 8mhz / 4 * 216 / 9 = 48Mhz |
| 31 | divr: None, | 31 | divr: None, |
| 32 | }); | 32 | }); |
| 33 | config.rcc.ahb_pre = AHBPrescaler::DIV1; | 33 | config.rcc.ahb_pre = AHBPrescaler::DIV1; |
diff --git a/examples/stm32f7/src/bin/usb_serial.rs b/examples/stm32f7/src/bin/usb_serial.rs index 6aca732b4..4991edbf0 100644 --- a/examples/stm32f7/src/bin/usb_serial.rs +++ b/examples/stm32f7/src/bin/usb_serial.rs | |||
| @@ -32,8 +32,8 @@ async fn main(_spawner: Spawner) { | |||
| 32 | config.rcc.pll = Some(Pll { | 32 | config.rcc.pll = Some(Pll { |
| 33 | prediv: PllPreDiv::DIV4, | 33 | prediv: PllPreDiv::DIV4, |
| 34 | mul: PllMul::MUL216, | 34 | mul: PllMul::MUL216, |
| 35 | divp: Some(Pllp::DIV2), // 8mhz / 4 * 216 / 2 = 216Mhz | 35 | divp: Some(PllPDiv::DIV2), // 8mhz / 4 * 216 / 2 = 216Mhz |
| 36 | divq: Some(Pllq::DIV9), // 8mhz / 4 * 216 / 9 = 48Mhz | 36 | divq: Some(PllQDiv::DIV9), // 8mhz / 4 * 216 / 9 = 48Mhz |
| 37 | divr: None, | 37 | divr: None, |
| 38 | }); | 38 | }); |
| 39 | config.rcc.ahb_pre = AHBPrescaler::DIV1; | 39 | config.rcc.ahb_pre = AHBPrescaler::DIV1; |