stm32: autogenerate mux config for all chips.

2 files changed, 26 insertions, 28 deletions

diff --git a/examples/stm32g0/src/bin/hf_timer.rs b/examples/stm32g0/src/bin/hf_timer.rs
index 3f63d0dfd..647ff0419 100644
--- a/examples/stm32g0/src/bin/hf_timer.rs
+++ b/examples/stm32g0/src/bin/hf_timer.rs
@@ -4,37 +4,35 @@
 use defmt::info;
 use embassy_executor::Spawner;
 use embassy_stm32::gpio::OutputType;
-use embassy_stm32::pac::rcc::vals::Tim1sel;
-use embassy_stm32::rcc::{Config as RccConfig, PllConfig, PllSource, Pllm, Plln, Pllq, Pllr, Sysclk};
 use embassy_stm32::time::khz;
 use embassy_stm32::timer::complementary_pwm::{ComplementaryPwm, ComplementaryPwmPin};
 use embassy_stm32::timer::simple_pwm::PwmPin;
 use embassy_stm32::timer::Channel;
-use embassy_stm32::{pac, Config as PeripheralConfig};
+use embassy_stm32::Config as PeripheralConfig;
 use {defmt_rtt as _, panic_probe as _};
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
-    let mut rcc_config = RccConfig::default();
-    rcc_config.sys = Sysclk::PLL(PllConfig {
-        source: PllSource::HSI,
-        m: Pllm::DIV1,
-        n: Plln::MUL16,
-        r: Pllr::DIV4,       // CPU clock comes from PLLR (HSI (16MHz) / 1 * 16 / 4 = 64MHz)
-        q: Some(Pllq::DIV2), // TIM1 or TIM15 can be sourced from PLLQ (HSI (16MHz) / 1 * 16 / 2 = 128MHz)
-        p: None,
-    });
-
-    let mut peripheral_config = PeripheralConfig::default();
-    peripheral_config.rcc = rcc_config;
-
-    let p = embassy_stm32::init(peripheral_config);
-
-    // configure TIM1 mux to select PLLQ as clock source
-    // https://www.st.com/resource/en/reference_manual/rm0444-stm32g0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
-    // RM0444 page 210
-    // RCC - Peripherals Independent Clock Control Register - bit 22 -> 1
-    pac::RCC.ccipr().modify(|w| w.set_tim1sel(Tim1sel::PLL1_Q));
+    let mut config = PeripheralConfig::default();
+    {
+        use embassy_stm32::rcc::*;
+
+        config.rcc.sys = Sysclk::PLL(PllConfig {
+            source: PllSource::HSI,
+            m: Pllm::DIV1,
+            n: Plln::MUL16,
+            r: Pllr::DIV4,       // CPU clock comes from PLLR (HSI (16MHz) / 1 * 16 / 4 = 64MHz)
+            q: Some(Pllq::DIV2), // TIM1 or TIM15 can be sourced from PLLQ (HSI (16MHz) / 1 * 16 / 2 = 128MHz)
+            p: None,
+        });
+
+        // configure TIM1 mux to select PLLQ as clock source
+        // https://www.st.com/resource/en/reference_manual/rm0444-stm32g0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
+        // RM0444 page 210
+        // RCC - Peripherals Independent Clock Control Register - bit 22 -> 1
+        config.rcc.mux.tim1sel = embassy_stm32::rcc::mux::Tim1sel::PLL1_Q;
+    }
+    let p = embassy_stm32::init(config);
 
     let ch1 = PwmPin::new_ch1(p.PA8, OutputType::PushPull);
     let ch1n = ComplementaryPwmPin::new_ch1(p.PA7, OutputType::PushPull);
diff --git a/examples/stm32g0/src/bin/usb_serial.rs b/examples/stm32g0/src/bin/usb_serial.rs
index f5aaa5624..8b9915626 100644
--- a/examples/stm32g0/src/bin/usb_serial.rs
+++ b/examples/stm32g0/src/bin/usb_serial.rs
@@ -4,7 +4,6 @@
 use defmt::{panic, *};
 use embassy_executor::Spawner;
 use embassy_futures::join::join;
-use embassy_stm32::rcc::{Hsi48Config, UsbSrc};
 use embassy_stm32::usb::{Driver, Instance};
 use embassy_stm32::{bind_interrupts, peripherals, usb, Config};
 use embassy_usb::class::cdc_acm::{CdcAcmClass, State};
@@ -19,10 +18,11 @@ bind_interrupts!(struct Irqs {
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
     let mut config = Config::default();
-    config.rcc.usb_src = Some(UsbSrc::Hsi48(Hsi48Config {
-        sync_from_usb: true,
-        ..Default::default()
-    }));
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true });
+        config.rcc.mux.usbsel = mux::Usbsel::HSI48;
+    }
     let p = embassy_stm32::init(config);
 
     info!("Hello World!");