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| author | Dario Nieuwenhuis <[email protected]> | 2024-02-26 00:00:17 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2024-02-26 00:00:17 +0100 |
| commit | 489d0be2a2971cfae7d6413b601bbd044d42e351 (patch) | |
| tree | b930aa13b1f43efedcf8bc19e85e94036dedc7d2 /examples/stm32l4/src/bin/spe_adin1110_http_server.rs | |
| parent | 497515ed57b768332295ef58630231609fb959fc (diff) | |
stm32/rcc: unify naming sysclk field to `sys`, enum to `Sysclk`.
Diffstat (limited to 'examples/stm32l4/src/bin/spe_adin1110_http_server.rs')
| -rw-r--r-- | examples/stm32l4/src/bin/spe_adin1110_http_server.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs index 026a3a477..32bfab6eb 100644 --- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs +++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs | |||
| @@ -75,7 +75,7 @@ async fn main(spawner: Spawner) { | |||
| 75 | use embassy_stm32::rcc::*; | 75 | use embassy_stm32::rcc::*; |
| 76 | // 80Mhz clock (Source: 8 / SrcDiv: 1 * PllMul 20 / ClkDiv 2) | 76 | // 80Mhz clock (Source: 8 / SrcDiv: 1 * PllMul 20 / ClkDiv 2) |
| 77 | // 80MHz highest frequency for flash 0 wait. | 77 | // 80MHz highest frequency for flash 0 wait. |
| 78 | config.rcc.mux = ClockSrc::PLL1_R; | 78 | config.rcc.sys = Sysclk::PLL1_R; |
| 79 | config.rcc.hse = Some(Hse { | 79 | config.rcc.hse = Some(Hse { |
| 80 | freq: Hertz::mhz(8), | 80 | freq: Hertz::mhz(8), |
| 81 | mode: HseMode::Oscillator, | 81 | mode: HseMode::Oscillator, |