diff options
| author | Ulf Lilleengen <[email protected]> | 2021-06-14 10:48:14 +0200 |
|---|---|---|
| committer | Ulf Lilleengen <[email protected]> | 2021-06-14 11:33:11 +0200 |
| commit | 95532726b2fe38c3510b8ba3e56c3cb8f4e3a914 (patch) | |
| tree | f201af1337a887cbb92220a25a18a34cad2c3313 /examples/stm32l4/src | |
| parent | a13e07625fb191145d4dcb13b1dac9f4ef86bb8c (diff) | |
Add minimal RCC impls for L4 and F4
Diffstat (limited to 'examples/stm32l4/src')
| -rw-r--r-- | examples/stm32l4/src/bin/spi.rs | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/examples/stm32l4/src/bin/spi.rs b/examples/stm32l4/src/bin/spi.rs index 9db854dc3..7c672b70d 100644 --- a/examples/stm32l4/src/bin/spi.rs +++ b/examples/stm32l4/src/bin/spi.rs | |||
| @@ -44,7 +44,6 @@ fn main() -> ! { | |||
| 44 | let p = embassy_stm32::init(Default::default()); | 44 | let p = embassy_stm32::init(Default::default()); |
| 45 | 45 | ||
| 46 | let mut spi = Spi::new( | 46 | let mut spi = Spi::new( |
| 47 | Hertz(16_000_000), | ||
| 48 | p.SPI3, | 47 | p.SPI3, |
| 49 | p.PC10, | 48 | p.PC10, |
| 50 | p.PC12, | 49 | p.PC12, |