stm32: No need to enable GPIO clocks manually

9 files changed, 25 insertions, 110 deletions

diff --git a/examples/stm32l4/Cargo.toml b/examples/stm32l4/Cargo.toml
index 069c1434d..41c189c69 100644
--- a/examples/stm32l4/Cargo.toml
+++ b/examples/stm32l4/Cargo.toml
@@ -21,7 +21,6 @@ embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt", "def
 embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] }
 embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "defmt-trace", "unstable-pac", "stm32l4s5vi"]  }
 embassy-extras = {version = "0.1.0", path = "../../embassy-extras" }
-stm32l4 = { version = "0.13", features = ["stm32l4x5" ] }
 stm32l4xx-hal = { version = "0.6.0", features = ["stm32l4x5"] }
 
 defmt = "0.2.0"
diff --git a/examples/stm32l4/src/bin/adc.rs b/examples/stm32l4/src/bin/adc.rs
index a3c44d3c1..6894d664a 100644
--- a/examples/stm32l4/src/bin/adc.rs
+++ b/examples/stm32l4/src/bin/adc.rs
@@ -11,11 +11,10 @@ mod example_common;
 
 use example_common::*;
 
-use cortex_m_rt::entry;
-//use stm32f4::stm32f429 as pac;
 use cortex_m::delay::Delay;
+use cortex_m_rt::entry;
 use embassy_stm32::adc::{Adc, Resolution};
-use stm32l4::stm32l4x5 as pac;
+use embassy_stm32::pac;
 use stm32l4xx_hal::prelude::*;
 use stm32l4xx_hal::rcc::PllSource;
 
@@ -40,31 +39,16 @@ fn main() -> ! {
         .pll_source(PllSource::HSI16)
         .freeze(&mut flash.acr, &mut pwr);
 
-    let pp = unsafe { pac::Peripherals::steal() };
-
-    pp.RCC.ccipr.modify(|_, w| {
-        unsafe {
-            w.adcsel().bits(0b11);
-        }
-        w
-    });
-
-    pp.DBGMCU.cr.modify(|_, w| {
-        w.dbg_sleep().set_bit();
-        w.dbg_standby().set_bit();
-        w.dbg_stop().set_bit()
-    });
-
-    pp.RCC.ahb2enr.modify(|_, w| {
-        w.adcen().set_bit();
-        w.gpioaen().set_bit();
-        w.gpioben().set_bit();
-        w.gpiocen().set_bit();
-        w.gpioden().set_bit();
-        w.gpioeen().set_bit();
-        w.gpiofen().set_bit();
-        w
-    });
+    unsafe {
+        pac::RCC.ccipr().modify(|w| {
+            w.set_adcsel(0b11);
+        });
+        pac::DBGMCU.cr().modify(|w| {
+            w.set_dbg_sleep(true);
+            w.set_dbg_standby(true);
+            w.set_dbg_stop(true);
+        });
+    }
 
     let p = embassy_stm32::init(Default::default());
 
diff --git a/examples/stm32l4/src/bin/blinky.rs b/examples/stm32l4/src/bin/blinky.rs
index 0af16867f..ba271b9ee 100644
--- a/examples/stm32l4/src/bin/blinky.rs
+++ b/examples/stm32l4/src/bin/blinky.rs
@@ -24,15 +24,6 @@ fn main() -> ! {
             w.set_dbg_standby(true);
             w.set_dbg_stop(true);
         });
-
-        pac::RCC.ahb2enr().modify(|w| {
-            w.set_gpioaen(true);
-            w.set_gpioben(true);
-            w.set_gpiocen(true);
-            w.set_gpioden(true);
-            w.set_gpioeen(true);
-            w.set_gpiofen(true);
-        });
     }
 
     let p = embassy_stm32::init(Default::default());
diff --git a/examples/stm32l4/src/bin/button.rs b/examples/stm32l4/src/bin/button.rs
index c72463605..9d2fc2f21 100644
--- a/examples/stm32l4/src/bin/button.rs
+++ b/examples/stm32l4/src/bin/button.rs
@@ -28,15 +28,6 @@ fn main() -> ! {
         pac::RCC.apb2enr().modify(|w| {
             w.set_syscfgen(true);
         });
-
-        pac::RCC.ahb2enr().modify(|w| {
-            w.set_gpioaen(true);
-            w.set_gpioben(true);
-            w.set_gpiocen(true);
-            w.set_gpioden(true);
-            w.set_gpioeen(true);
-            w.set_gpiofen(true);
-        });
     }
 
     let p = embassy_stm32::init(Default::default());
diff --git a/examples/stm32l4/src/bin/button_exti.rs b/examples/stm32l4/src/bin/button_exti.rs
index 6a06e4370..83537d92e 100644
--- a/examples/stm32l4/src/bin/button_exti.rs
+++ b/examples/stm32l4/src/bin/button_exti.rs
@@ -59,15 +59,6 @@ fn main() -> ! {
         pac::RCC.apb2enr().modify(|w| {
             w.set_syscfgen(true);
         });
-
-        pac::RCC.ahb2enr().modify(|w| {
-            w.set_gpioaen(true);
-            w.set_gpioben(true);
-            w.set_gpiocen(true);
-            w.set_gpioden(true);
-            w.set_gpioeen(true);
-            w.set_gpiofen(true);
-        });
     }
 
     unsafe { embassy::time::set_clock(&ZeroClock) };
diff --git a/examples/stm32l4/src/bin/dac.rs b/examples/stm32l4/src/bin/dac.rs
index 5317ac35f..1f7f8d46a 100644
--- a/examples/stm32l4/src/bin/dac.rs
+++ b/examples/stm32l4/src/bin/dac.rs
@@ -13,11 +13,10 @@ use embassy_stm32::gpio::NoPin;
 use example_common::*;
 
 use cortex_m_rt::entry;
-//use stm32f4::stm32f429 as pac;
 use embassy_stm32::dac::{Channel, Dac, Value};
-use stm32l4::stm32l4x5 as pac;
+use embassy_stm32::pac;
+use stm32l4xx_hal::prelude::*;
 use stm32l4xx_hal::rcc::PllSource;
-use stm32l4xx_hal::{prelude::*};
 
 #[entry]
 fn main() -> ! {
@@ -30,36 +29,23 @@ fn main() -> ! {
 
     // TRY the other clock configuration
     // let clocks = rcc.cfgr.freeze(&mut flash.acr);
-    rcc
-        .cfgr
+    rcc.cfgr
         .sysclk(80.mhz())
         .pclk1(80.mhz())
         .pclk2(80.mhz())
         .pll_source(PllSource::HSI16)
         .freeze(&mut flash.acr, &mut pwr);
 
-    let pp = unsafe { pac::Peripherals::steal() };
-
-    pp.DBGMCU.cr.modify(|_, w| {
-        w.dbg_sleep().set_bit();
-        w.dbg_standby().set_bit();
-        w.dbg_stop().set_bit()
-    });
-
-    pp.RCC.apb1enr1.modify(|_, w| {
-        w.dac1en().set_bit();
-        w
-    });
-
-    pp.RCC.ahb2enr.modify(|_, w| {
-        w.gpioaen().set_bit();
-        w.gpioben().set_bit();
-        w.gpiocen().set_bit();
-        w.gpioden().set_bit();
-        w.gpioeen().set_bit();
-        w.gpiofen().set_bit();
-        w
-    });
+    unsafe {
+        pac::DBGMCU.cr().modify(|w| {
+            w.set_dbg_sleep(true);
+            w.set_dbg_standby(true);
+            w.set_dbg_stop(true);
+        });
+        pac::RCC.apb1enr1().modify(|w| {
+            w.set_dac1en(true);
+        });
+    }
 
     let p = embassy_stm32::init(Default::default());
 
diff --git a/examples/stm32l4/src/bin/spi.rs b/examples/stm32l4/src/bin/spi.rs
index 7cac01fd4..8702fe0cc 100644
--- a/examples/stm32l4/src/bin/spi.rs
+++ b/examples/stm32l4/src/bin/spi.rs
@@ -32,15 +32,6 @@ fn main() -> ! {
         pac::RCC.apb2enr().modify(|w| {
             w.set_syscfgen(true);
         });
-
-        pac::RCC.ahb2enr().modify(|w| {
-            w.set_gpioaen(true);
-            w.set_gpioben(true);
-            w.set_gpiocen(true);
-            w.set_gpioden(true);
-            w.set_gpioeen(true);
-            w.set_gpiofen(true);
-        });
     }
 
     let p = embassy_stm32::init(Default::default());
diff --git a/examples/stm32l4/src/bin/usart.rs b/examples/stm32l4/src/bin/usart.rs
index f572b1eff..1c2a861e2 100644
--- a/examples/stm32l4/src/bin/usart.rs
+++ b/examples/stm32l4/src/bin/usart.rs
@@ -60,15 +60,6 @@ fn main() -> ! {
             w.set_dma1en(true);
         });
 
-        pac::RCC.ahb2enr().modify(|w| {
-            w.set_gpioaen(true);
-            w.set_gpioben(true);
-            w.set_gpiocen(true);
-            w.set_gpioden(true);
-            w.set_gpioeen(true);
-            w.set_gpiofen(true);
-        });
-
         pac::RCC.apb1enr1().modify(|w| {
             w.set_uart4en(true);
         });
diff --git a/examples/stm32l4/src/bin/usart_dma.rs b/examples/stm32l4/src/bin/usart_dma.rs
index e325e3da3..b51699acf 100644
--- a/examples/stm32l4/src/bin/usart_dma.rs
+++ b/examples/stm32l4/src/bin/usart_dma.rs
@@ -67,15 +67,6 @@ fn main() -> ! {
             w.set_dma1en(true);
             w.set_dma2en(true);
         });
-
-        pac::RCC.ahb2enr().modify(|w| {
-            w.set_gpioaen(true);
-            w.set_gpioben(true);
-            w.set_gpiocen(true);
-            w.set_gpioden(true);
-            w.set_gpioeen(true);
-            w.set_gpiofen(true);
-        });
     }
 
     unsafe { embassy::time::set_clock(&ZeroClock) };