stm32: update metapac

4 files changed, 8 insertions, 8 deletions

diff --git a/examples/stm32l5/src/bin/rng.rs b/examples/stm32l5/src/bin/rng.rs
index e6233dbe6..b57f438ff 100644
--- a/examples/stm32l5/src/bin/rng.rs
+++ b/examples/stm32l5/src/bin/rng.rs
@@ -17,10 +17,10 @@ bind_interrupts!(struct Irqs {
 async fn main(_spawner: Spawner) {
     let mut config = Config::default();
     config.rcc.hsi16 = true;
-    config.rcc.mux = ClockSrc::PLL;
+    config.rcc.mux = ClockSrc::PLL1_R;
     config.rcc.pll = Some(Pll {
         // 64Mhz clock (16 / 1 * 8 / 2)
-        source: PLLSource::HSI16,
+        source: PLLSource::HSI,
         prediv: PllPreDiv::DIV1,
         mul: PllMul::MUL8,
         divp: None,
diff --git a/examples/stm32l5/src/bin/usb_ethernet.rs b/examples/stm32l5/src/bin/usb_ethernet.rs
index baa86640e..bbe44642b 100644
--- a/examples/stm32l5/src/bin/usb_ethernet.rs
+++ b/examples/stm32l5/src/bin/usb_ethernet.rs
@@ -46,10 +46,10 @@ async fn net_task(stack: &'static Stack<Device<'static, MTU>>) -> ! {
 async fn main(spawner: Spawner) {
     let mut config = Config::default();
     config.rcc.hsi16 = true;
-    config.rcc.mux = ClockSrc::PLL;
+    config.rcc.mux = ClockSrc::PLL1_R;
     config.rcc.pll = Some(Pll {
         // 80Mhz clock (16 / 1 * 10 / 2)
-        source: PLLSource::HSI16,
+        source: PLLSource::HSI,
         prediv: PllPreDiv::DIV1,
         mul: PllMul::MUL10,
         divp: None,
diff --git a/examples/stm32l5/src/bin/usb_hid_mouse.rs b/examples/stm32l5/src/bin/usb_hid_mouse.rs
index 1ce7e3e49..44e29ee9c 100644
--- a/examples/stm32l5/src/bin/usb_hid_mouse.rs
+++ b/examples/stm32l5/src/bin/usb_hid_mouse.rs
@@ -23,10 +23,10 @@ bind_interrupts!(struct Irqs {
 async fn main(_spawner: Spawner) {
     let mut config = Config::default();
     config.rcc.hsi16 = true;
-    config.rcc.mux = ClockSrc::PLL;
+    config.rcc.mux = ClockSrc::PLL1_R;
     config.rcc.pll = Some(Pll {
         // 80Mhz clock (16 / 1 * 10 / 2)
-        source: PLLSource::HSI16,
+        source: PLLSource::HSI,
         prediv: PllPreDiv::DIV1,
         mul: PllMul::MUL10,
         divp: None,
diff --git a/examples/stm32l5/src/bin/usb_serial.rs b/examples/stm32l5/src/bin/usb_serial.rs
index 03d277a22..612b891ac 100644
--- a/examples/stm32l5/src/bin/usb_serial.rs
+++ b/examples/stm32l5/src/bin/usb_serial.rs
@@ -21,10 +21,10 @@ bind_interrupts!(struct Irqs {
 async fn main(_spawner: Spawner) {
     let mut config = Config::default();
     config.rcc.hsi16 = true;
-    config.rcc.mux = ClockSrc::PLL;
+    config.rcc.mux = ClockSrc::PLL1_R;
     config.rcc.pll = Some(Pll {
         // 80Mhz clock (16 / 1 * 10 / 2)
-        source: PLLSource::HSI16,
+        source: PLLSource::HSI,
         prediv: PllPreDiv::DIV1,
         mul: PllMul::MUL10,
         divp: None,