aboutsummaryrefslogtreecommitdiff
path: root/examples/stm32u5/src
diff options
context:
space:
mode:
authorDario Nieuwenhuis <[email protected]>2023-10-09 02:48:22 +0200
committerDario Nieuwenhuis <[email protected]>2023-10-09 02:48:22 +0200
commit6186fe08070c5f497d72586640db287193b41894 (patch)
treeaaef02d5344086bde66725a853851546961520fa /examples/stm32u5/src
parentc4cff0b79bc54634db9d0fa24a24add49b7ec7fe (diff)
stm32/rcc: use PLL enums from PAC.
Diffstat (limited to 'examples/stm32u5/src')
-rw-r--r--examples/stm32u5/src/bin/usb_serial.rs6
1 files changed, 3 insertions, 3 deletions
diff --git a/examples/stm32u5/src/bin/usb_serial.rs b/examples/stm32u5/src/bin/usb_serial.rs
index 278bd30f0..9b2adb0ac 100644
--- a/examples/stm32u5/src/bin/usb_serial.rs
+++ b/examples/stm32u5/src/bin/usb_serial.rs
@@ -25,9 +25,9 @@ async fn main(_spawner: Spawner) {
25 let mut config = Config::default(); 25 let mut config = Config::default();
26 config.rcc.mux = ClockSrc::PLL1R(PllConfig { 26 config.rcc.mux = ClockSrc::PLL1R(PllConfig {
27 source: PllSrc::HSI16, 27 source: PllSrc::HSI16,
28 m: PllM::Div2, 28 m: Pllm::DIV2,
29 n: PllN::Mul10, 29 n: Plln::MUL10,
30 r: PllClkDiv::NotDivided, 30 r: Plldiv::DIV1,
31 }); 31 });
32 //config.rcc.mux = ClockSrc::MSI(MSIRange::Range48mhz); 32 //config.rcc.mux = ClockSrc::MSI(MSIRange::Range48mhz);
33 config.rcc.hsi48 = true; 33 config.rcc.hsi48 = true;