diff options
| author | Dario Nieuwenhuis <[email protected]> | 2024-02-26 00:00:17 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2024-02-26 00:00:17 +0100 |
| commit | 489d0be2a2971cfae7d6413b601bbd044d42e351 (patch) | |
| tree | b930aa13b1f43efedcf8bc19e85e94036dedc7d2 /examples/stm32wl/src/bin/random.rs | |
| parent | 497515ed57b768332295ef58630231609fb959fc (diff) | |
stm32/rcc: unify naming sysclk field to `sys`, enum to `Sysclk`.
Diffstat (limited to 'examples/stm32wl/src/bin/random.rs')
| -rw-r--r-- | examples/stm32wl/src/bin/random.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/examples/stm32wl/src/bin/random.rs b/examples/stm32wl/src/bin/random.rs index 3610392be..8e9fe02b2 100644 --- a/examples/stm32wl/src/bin/random.rs +++ b/examples/stm32wl/src/bin/random.rs | |||
| @@ -22,7 +22,7 @@ async fn main(_spawner: Spawner) { | |||
| 22 | mode: HseMode::Bypass, | 22 | mode: HseMode::Bypass, |
| 23 | prescaler: HsePrescaler::DIV1, | 23 | prescaler: HsePrescaler::DIV1, |
| 24 | }); | 24 | }); |
| 25 | config.rcc.mux = ClockSrc::PLL1_R; | 25 | config.rcc.sys = Sysclk::PLL1_R; |
| 26 | config.rcc.pll = Some(Pll { | 26 | config.rcc.pll = Some(Pll { |
| 27 | source: PllSource::HSE, | 27 | source: PllSource::HSE, |
| 28 | prediv: PllPreDiv::DIV2, | 28 | prediv: PllPreDiv::DIV2, |