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authorJames Munns <[email protected]>2025-11-14 15:37:48 +0100
committerJames Munns <[email protected]>2025-11-14 15:37:48 +0100
commit9b91d886e6a5067d6a553715a053db653af55ca6 (patch)
tree1155ea138e59f0babec1bb331ab5b48ec0029da7 /src
parent9f889d015ef5d373343ad6c769824e28be780e53 (diff)
Cargo fmt
Diffstat (limited to 'src')
-rw-r--r--src/clocks/mod.rs9
-rw-r--r--src/lib.rs14
-rw-r--r--src/lpuart/mod.rs4
3 files changed, 7 insertions, 20 deletions
diff --git a/src/clocks/mod.rs b/src/clocks/mod.rs
index db41db628..24e118e38 100644
--- a/src/clocks/mod.rs
+++ b/src/clocks/mod.rs
@@ -2,10 +2,8 @@
2//! Provides reusable gate abstractions for peripherals used by the examples. 2//! Provides reusable gate abstractions for peripherals used by the examples.
3use core::cell::RefCell; 3use core::cell::RefCell;
4 4
5use mcxa_pac::scg0::{ 5use mcxa_pac::scg0::firccsr::{FircFclkPeriphEn, FircSclkPeriphEn, Fircsten};
6 firccsr::{FircFclkPeriphEn, FircSclkPeriphEn, Fircsten}, 6use mcxa_pac::scg0::sirccsr::{SircClkPeriphEn, Sircsten};
7 sirccsr::{SircClkPeriphEn, Sircsten},
8};
9use periph_helpers::SPConfHelper; 7use periph_helpers::SPConfHelper;
10 8
11use crate::pac; 9use crate::pac;
@@ -149,7 +147,8 @@ impl SPConfHelper for NoConfig {
149} 147}
150 148
151pub mod gate { 149pub mod gate {
152 use super::{periph_helpers::{AdcConfig, LpuartConfig, OsTimerConfig}, *}; 150 use super::periph_helpers::{AdcConfig, LpuartConfig, OsTimerConfig};
151 use super::*;
153 152
154 impl_cc_gate!(PORT1, mrcc_glb_cc1, port1, NoConfig); 153 impl_cc_gate!(PORT1, mrcc_glb_cc1, port1, NoConfig);
155 impl_cc_gate!(PORT2, mrcc_glb_cc1, port2, NoConfig); 154 impl_cc_gate!(PORT2, mrcc_glb_cc1, port2, NoConfig);
diff --git a/src/lib.rs b/src/lib.rs
index e3e603ef2..fd7d3cd07 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -16,19 +16,7 @@ pub mod ostimer;
16pub mod rtc; 16pub mod rtc;
17pub mod uart; 17pub mod uart;
18 18
19embassy_hal_internal::peripherals!( 19embassy_hal_internal::peripherals!(PORT1, PORT2, PORT3, LPUART2, OSTIMER0, GPIO, PIO2_2, PIO2_3, GPIO3, RTC0, ADC1,);
20 PORT1,
21 PORT2,
22 PORT3,
23 LPUART2,
24 OSTIMER0,
25 GPIO,
26 PIO2_2,
27 PIO2_3,
28 GPIO3,
29 RTC0,
30 ADC1,
31);
32 20
33/// Get access to the PAC Peripherals for low-level register access. 21/// Get access to the PAC Peripherals for low-level register access.
34/// This is a lazy-initialized singleton that can be called after init(). 22/// This is a lazy-initialized singleton that can be called after init().
diff --git a/src/lpuart/mod.rs b/src/lpuart/mod.rs
index 35b4db24c..be69372a2 100644
--- a/src/lpuart/mod.rs
+++ b/src/lpuart/mod.rs
@@ -3,8 +3,8 @@ use core::marker::PhantomData;
3use embassy_hal_internal::{Peri, PeripheralType}; 3use embassy_hal_internal::{Peri, PeripheralType};
4use paste::paste; 4use paste::paste;
5 5
6use crate::clocks::periph_helpers::{LpuartClockSel, LpuartConfig}; 6use crate::clocks::periph_helpers::{Div4, LpuartClockSel, LpuartConfig};
7use crate::clocks::{enable_and_reset, ClockError, periph_helpers::Div4, Gate, PoweredClock}; 7use crate::clocks::{enable_and_reset, ClockError, Gate, PoweredClock};
8use crate::pac::lpuart0::baud::Sbns as StopBits; 8use crate::pac::lpuart0::baud::Sbns as StopBits;
9use crate::pac::lpuart0::ctrl::{Idlecfg as IdleConfig, Ilt as IdleType, Pt as Parity, M as DataBits}; 9use crate::pac::lpuart0::ctrl::{Idlecfg as IdleConfig, Ilt as IdleType, Pt as Parity, M as DataBits};
10use crate::pac::lpuart0::modir::{Txctsc as TxCtsConfig, Txctssrc as TxCtsSource}; 10use crate::pac::lpuart0::modir::{Txctsc as TxCtsConfig, Txctssrc as TxCtsSource};