3 files changed, 7 insertions, 20 deletions

diff --git a/src/clocks/mod.rs b/src/clocks/mod.rs
index db41db628..24e118e38 100644
--- a/src/clocks/mod.rs
+++ b/src/clocks/mod.rs
@@ -2,10 +2,8 @@
 //! Provides reusable gate abstractions for peripherals used by the examples.
 use core::cell::RefCell;
 
-use mcxa_pac::scg0::{
-    firccsr::{FircFclkPeriphEn, FircSclkPeriphEn, Fircsten},
-    sirccsr::{SircClkPeriphEn, Sircsten},
-};
+use mcxa_pac::scg0::firccsr::{FircFclkPeriphEn, FircSclkPeriphEn, Fircsten};
+use mcxa_pac::scg0::sirccsr::{SircClkPeriphEn, Sircsten};
 use periph_helpers::SPConfHelper;
 
 use crate::pac;
@@ -149,7 +147,8 @@ impl SPConfHelper for NoConfig {
 }
 
 pub mod gate {
-    use super::{periph_helpers::{AdcConfig, LpuartConfig, OsTimerConfig}, *};
+    use super::periph_helpers::{AdcConfig, LpuartConfig, OsTimerConfig};
+    use super::*;
 
     impl_cc_gate!(PORT1, mrcc_glb_cc1, port1, NoConfig);
     impl_cc_gate!(PORT2, mrcc_glb_cc1, port2, NoConfig);
diff --git a/src/lib.rs b/src/lib.rs
index e3e603ef2..fd7d3cd07 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -16,19 +16,7 @@ pub mod ostimer;
 pub mod rtc;
 pub mod uart;
 
-embassy_hal_internal::peripherals!(
-    PORT1,
-    PORT2,
-    PORT3,
-    LPUART2,
-    OSTIMER0,
-    GPIO,
-    PIO2_2,
-    PIO2_3,
-    GPIO3,
-    RTC0,
-    ADC1,
-);
+embassy_hal_internal::peripherals!(PORT1, PORT2, PORT3, LPUART2, OSTIMER0, GPIO, PIO2_2, PIO2_3, GPIO3, RTC0, ADC1,);
 
 /// Get access to the PAC Peripherals for low-level register access.
 /// This is a lazy-initialized singleton that can be called after init().
diff --git a/src/lpuart/mod.rs b/src/lpuart/mod.rs
index 35b4db24c..be69372a2 100644
--- a/src/lpuart/mod.rs
+++ b/src/lpuart/mod.rs
@@ -3,8 +3,8 @@ use core::marker::PhantomData;
 use embassy_hal_internal::{Peri, PeripheralType};
 use paste::paste;
 
-use crate::clocks::periph_helpers::{LpuartClockSel, LpuartConfig};
-use crate::clocks::{enable_and_reset, ClockError, periph_helpers::Div4, Gate, PoweredClock};
+use crate::clocks::periph_helpers::{Div4, LpuartClockSel, LpuartConfig};
+use crate::clocks::{enable_and_reset, ClockError, Gate, PoweredClock};
 use crate::pac::lpuart0::baud::Sbns as StopBits;
 use crate::pac::lpuart0::ctrl::{Idlecfg as IdleConfig, Ilt as IdleType, Pt as Parity, M as DataBits};
 use crate::pac::lpuart0::modir::{Txctsc as TxCtsConfig, Txctssrc as TxCtsSource};