Reduce number of features

We don't need features for drivers that always exist.

Signed-off-by: Felipe Balbi <[email protected]>

11 files changed, 136 insertions, 141 deletions

diff --git a/src/adc.rs b/src/adc.rs
index f56d744c6..5625330e9 100644
--- a/src/adc.rs
+++ b/src/adc.rs
@@ -1,12 +1,12 @@
-//! ADC driver
+//! ADC driver
 use crate::pac;
 use core::sync::atomic::{AtomicBool, Ordering};
 
-use crate::pac::adc1::ctrl::{CalAvgs};
-use crate::pac::adc1::cfg::{Refsel, Pwrsel, Tprictrl, Tres, Tcmdres, HptExdi};
-use crate::pac::adc1::tctrl::{Tcmd, Tpri};
+use crate::pac::adc1::cfg::{HptExdi, Pwrsel, Refsel, Tcmdres, Tprictrl, Tres};
+use crate::pac::adc1::cmdh1::{Avgs, Cmpen, Next, Sts};
 use crate::pac::adc1::cmdl1::{Adch, Ctype, Mode};
-use crate::pac::adc1::cmdh1::{Next, Avgs, Sts, Cmpen};
+use crate::pac::adc1::ctrl::CalAvgs;
+use crate::pac::adc1::tctrl::{Tcmd, Tpri};
 
 type Regs = pac::adc1::RegisterBlock;
 
@@ -17,9 +17,7 @@ pub trait Instance {
 }
 
 /// Token for ADC1
-#[cfg(feature = "adc1")]
 pub type Adc1 = crate::peripherals::ADC1;
-#[cfg(feature = "adc1")]
 impl Instance for crate::peripherals::ADC1 {
     #[inline(always)]
     fn ptr() -> *const Regs {
@@ -28,7 +26,6 @@ impl Instance for crate::peripherals::ADC1 {
 }
 
 // Also implement Instance for the Peri wrapper type
-#[cfg(feature = "adc1")]
 impl Instance for embassy_hal_internal::Peri<'_, crate::peripherals::ADC1> {
     #[inline(always)]
     fn ptr() -> *const Regs {
@@ -97,16 +94,15 @@ pub struct ConvResult {
     pub conv_value: u16,
 }
 
-
 pub struct Adc<I: Instance> {
     _inst: core::marker::PhantomData<I>,
 }
 
 impl<I: Instance> Adc<I> {
     /// initialize ADC
-    pub fn new(_inst: impl Instance, config : LpadcConfig) -> Self {
+    pub fn new(_inst: impl Instance, config: LpadcConfig) -> Self {
         let adc = unsafe { &*I::ptr() };
-    
+
         /* Reset the module. */
         adc.ctrl().modify(|_, w| w.rst().held_in_reset());
         adc.ctrl().modify(|_, w| w.rst().released_from_reset());
@@ -124,64 +120,81 @@ impl<I: Instance> Adc<I> {
         }
 
         /* Set calibration average mode. */
-        adc.ctrl().modify(|_, w| w.cal_avgs().variant(config.conversion_average_mode));
- 
-        adc.cfg().write(|w| unsafe {         
+        adc.ctrl()
+            .modify(|_, w| w.cal_avgs().variant(config.conversion_average_mode));
+
+        adc.cfg().write(|w| unsafe {
             let w = if config.enable_analog_preliminary {
                 w.pwren().pre_enabled()
             } else {
                 w
             };
 
-            w.pudly().bits(config.power_up_delay)
-             .refsel().variant(config.reference_voltage_source)
-             .pwrsel().variant(config.power_level_mode)
-             .tprictrl().variant(match config.trigger_priority_policy {
-                 TriggerPriorityPolicy::ConvPreemptSoftlyNotAutoResumed |
-                 TriggerPriorityPolicy::ConvPreemptSoftlyAutoRestarted |
-                 TriggerPriorityPolicy::ConvPreemptSoftlyAutoResumed => Tprictrl::FinishCurrentOnPriority,
-                 TriggerPriorityPolicy::ConvPreemptSubsequentlyNotAutoResumed |
-                 TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoRestarted |
-                 TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoResumed => Tprictrl::FinishSequenceOnPriority,
-                 _ => Tprictrl::AbortCurrentOnPriority,
-             })
-             .tres().variant(match config.trigger_priority_policy {
-                 TriggerPriorityPolicy::ConvPreemptImmediatelyAutoRestarted |
-                 TriggerPriorityPolicy::ConvPreemptSoftlyAutoRestarted | 
-                 TriggerPriorityPolicy::ConvPreemptImmediatelyAutoResumed |
-                 TriggerPriorityPolicy::ConvPreemptSoftlyAutoResumed |
-                 TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoRestarted |
-                 TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoResumed => Tres::Enabled,
-                 _ => Tres::Disabled,
-             })
-             .tcmdres().variant(match config.trigger_priority_policy {
-                 TriggerPriorityPolicy::ConvPreemptImmediatelyAutoResumed |
-                 TriggerPriorityPolicy::ConvPreemptSoftlyAutoResumed |
-                 TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoResumed |
-                 TriggerPriorityPolicy::TriggerPriorityExceptionDisabled => Tcmdres::Enabled,
-                 _ => Tcmdres::Disabled,
-             })
-             .hpt_exdi().variant(match config.trigger_priority_policy {
-                 TriggerPriorityPolicy::TriggerPriorityExceptionDisabled => HptExdi::Disabled,
-                 _ => HptExdi::Enabled,
-             })
-        }); 
+            w.pudly()
+                .bits(config.power_up_delay)
+                .refsel()
+                .variant(config.reference_voltage_source)
+                .pwrsel()
+                .variant(config.power_level_mode)
+                .tprictrl()
+                .variant(match config.trigger_priority_policy {
+                    TriggerPriorityPolicy::ConvPreemptSoftlyNotAutoResumed
+                    | TriggerPriorityPolicy::ConvPreemptSoftlyAutoRestarted
+                    | TriggerPriorityPolicy::ConvPreemptSoftlyAutoResumed => {
+                        Tprictrl::FinishCurrentOnPriority
+                    }
+                    TriggerPriorityPolicy::ConvPreemptSubsequentlyNotAutoResumed
+                    | TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoRestarted
+                    | TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoResumed => {
+                        Tprictrl::FinishSequenceOnPriority
+                    }
+                    _ => Tprictrl::AbortCurrentOnPriority,
+                })
+                .tres()
+                .variant(match config.trigger_priority_policy {
+                    TriggerPriorityPolicy::ConvPreemptImmediatelyAutoRestarted
+                    | TriggerPriorityPolicy::ConvPreemptSoftlyAutoRestarted
+                    | TriggerPriorityPolicy::ConvPreemptImmediatelyAutoResumed
+                    | TriggerPriorityPolicy::ConvPreemptSoftlyAutoResumed
+                    | TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoRestarted
+                    | TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoResumed => Tres::Enabled,
+                    _ => Tres::Disabled,
+                })
+                .tcmdres()
+                .variant(match config.trigger_priority_policy {
+                    TriggerPriorityPolicy::ConvPreemptImmediatelyAutoResumed
+                    | TriggerPriorityPolicy::ConvPreemptSoftlyAutoResumed
+                    | TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoResumed
+                    | TriggerPriorityPolicy::TriggerPriorityExceptionDisabled => Tcmdres::Enabled,
+                    _ => Tcmdres::Disabled,
+                })
+                .hpt_exdi()
+                .variant(match config.trigger_priority_policy {
+                    TriggerPriorityPolicy::TriggerPriorityExceptionDisabled => HptExdi::Disabled,
+                    _ => HptExdi::Enabled,
+                })
+        });
 
         if config.enable_conv_pause {
             adc.pause().modify(|_, w| unsafe {
-                w.pauseen().enabled()
-                 .pausedly().bits(config.conv_pause_delay)
+                w.pauseen()
+                    .enabled()
+                    .pausedly()
+                    .bits(config.conv_pause_delay)
             });
         } else {
             adc.pause().write(|w| unsafe { w.bits(0) });
         }
 
-        adc.fctrl0().write(|w| unsafe { w.fwmark().bits(config.fifo_watermark) });
+        adc.fctrl0()
+            .write(|w| unsafe { w.fwmark().bits(config.fifo_watermark) });
 
         // Enable ADC
         adc.ctrl().modify(|_, w| w.adcen().enabled());
 
-        Self { _inst: core::marker::PhantomData }
+        Self {
+            _inst: core::marker::PhantomData,
+        }
     }
 
     pub fn deinit(&self) {
@@ -189,7 +202,6 @@ impl<I: Instance> Adc<I> {
         adc.ctrl().modify(|_, w| w.adcen().disabled());
     }
 
-   
     pub fn get_default_config() -> LpadcConfig {
         LpadcConfig {
             enable_in_doze_mode: true,
@@ -208,13 +220,14 @@ impl<I: Instance> Adc<I> {
     pub fn do_offset_calibration(&self) {
         let adc = unsafe { &*I::ptr() };
         // Enable calibration mode
-        adc.ctrl().modify(|_, w| w.calofs().offset_calibration_request_pending());
+        adc.ctrl()
+            .modify(|_, w| w.calofs().offset_calibration_request_pending());
 
         // Wait for calibration to complete (polling status register)
         while adc.stat().read().cal_rdy().is_not_set() {}
     }
 
-    pub fn get_gain_conv_result(&self, mut gain_adjustment: f32) -> u32{
+    pub fn get_gain_conv_result(&self, mut gain_adjustment: f32) -> u32 {
         let mut gcra_array = [0u32; 17];
         let mut gcalr: u32 = 0;
 
@@ -234,20 +247,21 @@ impl<I: Instance> Adc<I> {
 
     pub fn do_auto_calibration(&self) {
         let adc = unsafe { &*I::ptr() };
-        adc.ctrl().modify(|_, w| w.cal_req().calibration_request_pending());
+        adc.ctrl()
+            .modify(|_, w| w.cal_req().calibration_request_pending());
 
         while adc.gcc0().read().rdy().is_gain_cal_not_valid() {}
 
-        
         let mut gcca = adc.gcc0().read().gain_cal().bits() as u32;
         if gcca & (((0xFFFF >> 0) + 1) >> 1) != 0 {
-                gcca |= !0xFFFF;
+            gcca |= !0xFFFF;
         }
 
         let gcra = 131072.0 / (131072.0 - gcca as f32);
 
         // Write to GCR0
-        adc.gcr0().write(|w| unsafe { w.bits(self.get_gain_conv_result(gcra)) }); 
+        adc.gcr0()
+            .write(|w| unsafe { w.bits(self.get_gain_conv_result(gcra)) });
 
         adc.gcr0().modify(|_, w| w.rdy().set_bit());
 
@@ -284,15 +298,22 @@ impl<I: Instance> Adc<I> {
         match index {
             1 => {
                 adc.cmdl1().write(|w| {
-                    w.adch().variant(config.channel_number)
-                                          .mode().variant(config.conversion_resolution_mode)
+                    w.adch()
+                        .variant(config.channel_number)
+                        .mode()
+                        .variant(config.conversion_resolution_mode)
                 });
                 adc.cmdh1().write(|w| unsafe {
-                    w.next().variant(config.chained_next_command_number)
-                     .loop_().bits(config.loop_count)
-                     .avgs().variant(config.hardware_average_mode)
-                     .sts().variant(config.sample_time_mode)
-                     .cmpen().variant(config.hardware_compare_mode);
+                    w.next()
+                        .variant(config.chained_next_command_number)
+                        .loop_()
+                        .bits(config.loop_count)
+                        .avgs()
+                        .variant(config.hardware_average_mode)
+                        .sts()
+                        .variant(config.sample_time_mode)
+                        .cmpen()
+                        .variant(config.hardware_compare_mode);
                     if config.enable_wait_trigger {
                         w.wait_trig().enabled();
                     }
@@ -371,5 +392,7 @@ pub fn on_interrupt() {
 
 pub struct AdcHandler;
 impl crate::interrupt::typelevel::Handler<crate::interrupt::typelevel::ADC1> for AdcHandler {
-    unsafe fn on_interrupt() { on_interrupt(); }
+    unsafe fn on_interrupt() {
+        on_interrupt();
+    }
 }
diff --git a/src/clocks.rs b/src/clocks.rs
index 5336c3efe..95d7ad567 100644
--- a/src/clocks.rs
+++ b/src/clocks.rs
@@ -112,10 +112,10 @@ pub unsafe fn init_fro16k(peripherals: &pac::Peripherals) {
     let vbat = &peripherals.vbat0;
     // Enable FRO16K oscillator
     vbat.froctla().modify(|_, w| w.fro_en().set_bit());
-    
+
     // Lock the control register
     vbat.frolcka().modify(|_, w| w.lock().set_bit());
-    
+
     // Enable clock outputs to both VSYS and VDD_CORE domains
     // Bit 0: clk_16k0 to VSYS domain
     // Bit 1: clk_16k1 to VDD_CORE domain
@@ -130,7 +130,6 @@ pub unsafe fn enable_adc(peripherals: &pac::Peripherals) {
 pub unsafe fn select_adc_clock(peripherals: &pac::Peripherals) {
     // Use FRO_LF_DIV (already running) MUX=0 DIV=0
     let mrcc = &peripherals.mrcc0;
-    mrcc.mrcc_adc_clksel()
-        .write(|w| w.mux().clkroot_func_0());
+    mrcc.mrcc_adc_clksel().write(|w| w.mux().clkroot_func_0());
     mrcc.mrcc_adc_clkdiv().write(|w| unsafe { w.bits(0) });
-}
\ No newline at end of file
+}
diff --git a/src/gpio.rs b/src/gpio.rs
index 08f375cba..faeefd333 100644
--- a/src/gpio.rs
+++ b/src/gpio.rs
@@ -66,7 +66,7 @@ pub trait PinId {
 }
 
 pub mod pins {
-    use super::{pac, AnyPin, PinId};
+    use super::{AnyPin, PinId, pac};
 
     macro_rules! define_pin {
         ($Name:ident, $port:literal, $pin:literal, $GpioBlk:ident) => {
diff --git a/src/interrupt.rs b/src/interrupt.rs
index 8226f01ab..d91e6479a 100644
--- a/src/interrupt.rs
+++ b/src/interrupt.rs
@@ -6,8 +6,8 @@ mod generated {
     embassy_hal_internal::interrupt_mod!(OS_EVENT, LPUART2, RTC, ADC1);
 }
 
-pub use generated::interrupt::typelevel;
 pub use generated::interrupt::Priority;
+pub use generated::interrupt::typelevel;
 
 use crate::pac::Interrupt;
 use core::sync::atomic::{AtomicU16, AtomicU32, Ordering};
diff --git a/src/lib.rs b/src/lib.rs
index eb4727106..518fe01d2 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,31 +1,19 @@
 #![no_std]
 
 pub mod clocks; // still provide clock helpers
-#[cfg(feature = "gpio")]
 pub mod gpio;
 pub mod pins; // pin mux helpers
 pub mod reset; // reset control helpers
 
+pub mod adc;
 pub mod config;
 pub mod interrupt;
-pub mod ostimer;
-pub mod uart;
 pub mod lpuart;
+pub mod ostimer;
 pub mod rtc;
-pub mod adc;
+pub mod uart;
 
-embassy_hal_internal::peripherals!(
-    #[cfg(feature = "lpuart2")]
-    LPUART2,
-    #[cfg(feature = "ostimer0")]
-    OSTIMER0,
-    #[cfg(feature = "gpio")]
-    GPIO,
-    #[cfg(feature = "rtc0")]
-    RTC0,
-    #[cfg(feature = "adc1")]
-    ADC1,
-);
+embassy_hal_internal::peripherals!(LPUART2, OSTIMER0, GPIO, RTC0, ADC1,);
 
 /// Get access to the PAC Peripherals for low-level register access.
 /// This is a lazy-initialized singleton that can be called after init().
@@ -42,43 +30,32 @@ pub fn pac() -> &'static pac::Peripherals {
     }
 }
 
-pub use cortex_m_rt;
-pub use mcxa276_pac as pac;
+#[cfg(feature = "unstable-pac")]
+pub use mcxa_pac as pac;
+#[cfg(not(feature = "unstable-pac"))]
+pub(crate) use mcxa_pac as pac;
+
 // Use cortex-m-rt's #[interrupt] attribute directly; PAC does not re-export it.
 
 // Re-export interrupt traits and types
+pub use adc::Adc1 as Adc1Token;
+pub use gpio::{AnyPin, Flex, Gpio as GpioToken, Input, Level, Output, pins::*};
 pub use interrupt::InterruptExt;
-#[cfg(feature = "ostimer0")]
 pub use ostimer::Ostimer0 as Ostimer0Token;
-#[cfg(feature = "lpuart2")]
-pub use uart::Lpuart2 as Uart2Token;
-#[cfg(feature = "rtc0")]
 pub use rtc::Rtc0 as Rtc0Token;
-#[cfg(feature = "adc1")]
-pub use adc::Adc1 as Adc1Token;
-#[cfg(feature = "gpio")]
-pub use gpio::{pins::*, AnyPin, Flex, Gpio as GpioToken, Input, Level, Output};
+pub use uart::Lpuart2 as Uart2Token;
 
 /// Initialize HAL with configuration (mirrors embassy-imxrt style). Minimal: just take peripherals.
 /// Also applies configurable NVIC priority for the OSTIMER OS_EVENT interrupt (no enabling).
 #[allow(unused_variables)]
 pub fn init(cfg: crate::config::Config) -> Peripherals {
     let peripherals = Peripherals::take();
-    #[cfg(feature = "ostimer0")]
-    {
-        // Apply user-configured priority early; enabling is left to examples/apps
-        crate::interrupt::OS_EVENT.set_priority(cfg.time_interrupt_priority);
-    }
-    #[cfg(feature = "rtc0")]
-    {
-        // Apply user-configured priority early; enabling is left to examples/apps
-        crate::interrupt::RTC.set_priority(cfg.rtc_interrupt_priority);
-    }
-    #[cfg(feature = "adc1")]
-    {
-        // Apply user-configured priority early; enabling is left to examples/apps
-        crate::interrupt::ADC1.set_priority(cfg.adc_interrupt_priority);
-    }
+    // Apply user-configured priority early; enabling is left to examples/apps
+    crate::interrupt::OS_EVENT.set_priority(cfg.time_interrupt_priority);
+    // Apply user-configured priority early; enabling is left to examples/apps
+    crate::interrupt::RTC.set_priority(cfg.rtc_interrupt_priority);
+    // Apply user-configured priority early; enabling is left to examples/apps
+    crate::interrupt::ADC1.set_priority(cfg.adc_interrupt_priority);
     peripherals
 }
 
diff --git a/src/lpuart/buffered.rs b/src/lpuart/buffered.rs
index 03673d975..e2382e86d 100644
--- a/src/lpuart/buffered.rs
+++ b/src/lpuart/buffered.rs
@@ -3,8 +3,8 @@ use core::marker::PhantomData;
 use core::sync::atomic::{AtomicBool, Ordering};
 use core::task::Poll;
 
-use embassy_hal_internal::atomic_ring_buffer::RingBuffer;
 use embassy_hal_internal::Peri;
+use embassy_hal_internal::atomic_ring_buffer::RingBuffer;
 use embassy_sync::waitqueue::AtomicWaker;
 
 use super::*;
diff --git a/src/lpuart/mod.rs b/src/lpuart/mod.rs
index 431547f86..99f4a4a66 100644
--- a/src/lpuart/mod.rs
+++ b/src/lpuart/mod.rs
@@ -6,7 +6,7 @@ use paste::paste;
 use crate::pac;
 use crate::pac::lpuart0::baud::Sbns as StopBits;
 use crate::pac::lpuart0::ctrl::{
-    Idlecfg as IdleConfig, Ilt as IdleType, Pt as Parity, M as DataBits,
+    Idlecfg as IdleConfig, Ilt as IdleType, M as DataBits, Pt as Parity,
 };
 use crate::pac::lpuart0::modir::{Txctsc as TxCtsConfig, Txctssrc as TxCtsSource};
 use crate::pac::lpuart0::stat::Msbf as MsbFirst;
diff --git a/src/ostimer.rs b/src/ostimer.rs
index b9688313a..6a4188db0 100644
--- a/src/ostimer.rs
+++ b/src/ostimer.rs
@@ -493,10 +493,8 @@ pub trait Instance {
 }
 
 // Token for OSTIMER0 provided by embassy-hal-internal peripherals macro.
-#[cfg(feature = "ostimer0")]
 pub type Ostimer0 = crate::peripherals::OSTIMER0;
 
-#[cfg(feature = "ostimer0")]
 impl Instance for crate::peripherals::OSTIMER0 {
     #[inline(always)]
     fn ptr() -> *const Regs {
@@ -505,7 +503,6 @@ impl Instance for crate::peripherals::OSTIMER0 {
 }
 
 // Also implement Instance for the Peri wrapper type
-#[cfg(feature = "ostimer0")]
 impl Instance for embassy_hal_internal::Peri<'_, crate::peripherals::OSTIMER0> {
     #[inline(always)]
     fn ptr() -> *const Regs {
@@ -528,11 +525,10 @@ fn gray_to_bin(gray: u64) -> u64 {
     bin
 }
 
-#[cfg(feature = "ostimer0")]
 pub mod time_driver {
     use super::{
-        bin_to_gray, now_ticks_read, Regs, ALARM_ACTIVE, ALARM_CALLBACK, ALARM_FLAG,
-        ALARM_TARGET_TIME, EVTIMER_HI_MASK, EVTIMER_HI_SHIFT, LOW_32_BIT_MASK,
+        ALARM_ACTIVE, ALARM_CALLBACK, ALARM_FLAG, ALARM_TARGET_TIME, EVTIMER_HI_MASK,
+        EVTIMER_HI_SHIFT, LOW_32_BIT_MASK, Regs, bin_to_gray, now_ticks_read,
     };
     use crate::pac;
     use core::sync::atomic::Ordering;
diff --git a/src/pins.rs b/src/pins.rs
index d46a3e6b3..1d92f9fef 100644
--- a/src/pins.rs
+++ b/src/pins.rs
@@ -57,7 +57,6 @@ pub unsafe fn configure_adc_pins() {
             .inv0()
             .lk()
             .lk0()
-
     });
     core::arch::asm!("dsb sy; isb sy");
 }
diff --git a/src/rtc.rs b/src/rtc.rs
index f83baab5e..5e3dfe6c1 100644
--- a/src/rtc.rs
+++ b/src/rtc.rs
@@ -1,6 +1,6 @@
 //! RTC DateTime driver.
 use crate::pac;
-use crate::pac::rtc0::cr::{Um};
+use crate::pac::rtc0::cr::Um;
 use core::sync::atomic::{AtomicBool, Ordering};
 
 type Regs = pac::rtc0::RegisterBlock;
@@ -13,9 +13,7 @@ pub trait Instance {
 }
 
 /// Token for RTC0
-#[cfg(feature = "rtc0")]
 pub type Rtc0 = crate::peripherals::RTC0;
-#[cfg(feature = "rtc0")]
 impl Instance for crate::peripherals::RTC0 {
     #[inline(always)]
     fn ptr() -> *const Regs {
@@ -24,7 +22,6 @@ impl Instance for crate::peripherals::RTC0 {
 }
 
 // Also implement Instance for the Peri wrapper type
-#[cfg(feature = "rtc0")]
 impl Instance for embassy_hal_internal::Peri<'_, crate::peripherals::RTC0> {
     #[inline(always)]
     fn ptr() -> *const Regs {
@@ -87,7 +84,6 @@ pub fn convert_datetime_to_seconds(datetime: &RtcDateTime) -> u32 {
     seconds
 }
 
-
 pub fn convert_seconds_to_datetime(seconds: u32) -> RtcDateTime {
     let mut seconds_remaining = seconds;
     let mut days = seconds_remaining / SECONDS_IN_A_DAY + 1;
@@ -166,11 +162,15 @@ impl<I: Instance> Rtc<I> {
         rtc.cr().modify(|_, w| w.um().variant(config.update_mode));
 
         rtc.tcr().modify(|_, w| unsafe {
-            w.cir().bits(config.compensation_interval)
-             .tcr().bits(config.compensation_time)
+            w.cir()
+                .bits(config.compensation_interval)
+                .tcr()
+                .bits(config.compensation_time)
         });
 
-        Self { _inst: core::marker::PhantomData }
+        Self {
+            _inst: core::marker::PhantomData,
+        }
     }
 
     pub fn set_datetime(&self, datetime: RtcDateTime) {
@@ -178,7 +178,7 @@ impl<I: Instance> Rtc<I> {
         let seconds = convert_datetime_to_seconds(&datetime);
         rtc.tsr().write(|w| unsafe { w.bits(seconds) });
     }
-    
+
     pub fn get_datetime(&self) -> RtcDateTime {
         let rtc = unsafe { &*I::ptr() };
         let seconds = rtc.tsr().read().bits();
@@ -203,7 +203,7 @@ impl<I: Instance> Rtc<I> {
         }
     }
 
-    pub fn get_alarm(&self) -> RtcDateTime{
+    pub fn get_alarm(&self) -> RtcDateTime {
         let rtc = unsafe { &*I::ptr() };
         let alarm_seconds = rtc.tar().read().bits();
         convert_seconds_to_datetime(alarm_seconds)
@@ -264,7 +264,7 @@ impl<I: Instance> Rtc<I> {
         ALARM_TRIGGERED.load(Ordering::Relaxed)
     }
 }
-    
+
 pub fn on_interrupt() {
     let rtc = unsafe { &*pac::Rtc0::ptr() };
     // Check if this is actually a time alarm interrupt
@@ -277,5 +277,7 @@ pub fn on_interrupt() {
 
 pub struct RtcHandler;
 impl crate::interrupt::typelevel::Handler<crate::interrupt::typelevel::RTC> for RtcHandler {
-    unsafe fn on_interrupt() { on_interrupt(); }
-}
\ No newline at end of file
+    unsafe fn on_interrupt() {
+        on_interrupt();
+    }
+}
diff --git a/src/uart.rs b/src/uart.rs
index 45b6b2be3..65dd91492 100644
--- a/src/uart.rs
+++ b/src/uart.rs
@@ -15,9 +15,7 @@ pub trait Instance {
 }
 
 /// Token for LPUART2 provided by embassy-hal-internal peripherals macro.
-#[cfg(feature = "lpuart2")]
 pub type Lpuart2 = crate::peripherals::LPUART2;
-#[cfg(feature = "lpuart2")]
 impl Instance for crate::peripherals::LPUART2 {
     #[inline(always)]
     fn ptr() -> *const Regs {
@@ -26,7 +24,6 @@ impl Instance for crate::peripherals::LPUART2 {
 }
 
 // Also implement Instance for the Peri wrapper type
-#[cfg(feature = "lpuart2")]
 impl Instance for embassy_hal_internal::Peri<'_, crate::peripherals::LPUART2> {
     #[inline(always)]
     fn ptr() -> *const Regs {
@@ -111,7 +108,7 @@ impl<I: Instance> Uart<I> {
         cortex_m::asm::delay(3); // Short delay for reset to take effect
         l.global().write(|w| w.rst().no_effect());
         cortex_m::asm::delay(10); // Allow peripheral to stabilize after reset
-                                  // 2) BAUD
+        // 2) BAUD
         let (osr, sbr) = compute_osr_sbr(cfg.src_hz, cfg.baud);
         l.baud().modify(|_, w| {
             let w = match cfg.stop_bits {
@@ -145,7 +142,9 @@ impl<I: Instance> Uart<I> {
         });
         l.water()
             .modify(|_, w| unsafe { w.txwater().bits(0).rxwater().bits(0) });
-        Self { _inst: core::marker::PhantomData }
+        Self {
+            _inst: core::marker::PhantomData,
+        }
     }
 
     /// Enable RX interrupts. The caller must ensure an appropriate IRQ handler is installed.