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| author | Dario Nieuwenhuis <[email protected]> | 2025-07-23 10:25:57 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2025-07-23 10:25:57 +0000 |
| commit | 60ed376a19f8f0401f13f4cdc065452f9cf3ddd7 (patch) | |
| tree | a0431af5418724966a2d5a5df000a1b88a5d6b38 /tests/stm32/src/common.rs | |
| parent | efc2306e6aaefd83250581e6607e0fbb0329a388 (diff) | |
| parent | e9211682a1a7067ae3a1fac36f94d981aab44912 (diff) | |
Merge pull request #4429 from obe1line/obe1line-stm32c071
Updates to support stm32c071
Diffstat (limited to 'tests/stm32/src/common.rs')
| -rw-r--r-- | tests/stm32/src/common.rs | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 829f2cff0..a4d8048ce 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs | |||
| @@ -34,6 +34,8 @@ teleprobe_meta::target!(b"nucleo-stm32u5a5zj"); | |||
| 34 | teleprobe_meta::target!(b"nucleo-stm32h563zi"); | 34 | teleprobe_meta::target!(b"nucleo-stm32h563zi"); |
| 35 | #[cfg(feature = "stm32c031c6")] | 35 | #[cfg(feature = "stm32c031c6")] |
| 36 | teleprobe_meta::target!(b"nucleo-stm32c031c6"); | 36 | teleprobe_meta::target!(b"nucleo-stm32c031c6"); |
| 37 | #[cfg(feature = "stm32c071rb")] | ||
| 38 | teleprobe_meta::target!(b"nucleo-stm32c071rb"); | ||
| 37 | #[cfg(feature = "stm32l073rz")] | 39 | #[cfg(feature = "stm32l073rz")] |
| 38 | teleprobe_meta::target!(b"nucleo-stm32l073rz"); | 40 | teleprobe_meta::target!(b"nucleo-stm32l073rz"); |
| 39 | #[cfg(feature = "stm32l152re")] | 41 | #[cfg(feature = "stm32l152re")] |
| @@ -186,6 +188,12 @@ define_peris!( | |||
| 186 | SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, | 188 | SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, |
| 187 | @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;}, | 189 | @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;}, |
| 188 | ); | 190 | ); |
| 191 | #[cfg(feature = "stm32c071rb")] | ||
| 192 | define_peris!( | ||
| 193 | UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2, | ||
| 194 | SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, | ||
| 195 | @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;}, | ||
| 196 | ); | ||
| 189 | #[cfg(feature = "stm32l496zg")] | 197 | #[cfg(feature = "stm32l496zg")] |
| 190 | define_peris!( | 198 | define_peris!( |
| 191 | UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3, | 199 | UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3, |
| @@ -271,7 +279,7 @@ pub fn config() -> Config { | |||
| 271 | #[allow(unused_mut)] | 279 | #[allow(unused_mut)] |
| 272 | let mut config = Config::default(); | 280 | let mut config = Config::default(); |
| 273 | 281 | ||
| 274 | #[cfg(feature = "stm32c031c6")] | 282 | #[cfg(any(feature = "stm32c031c6", feature = "stm32c071rb"))] |
| 275 | { | 283 | { |
| 276 | config.rcc.hsi = Some(Hsi { | 284 | config.rcc.hsi = Some(Hsi { |
| 277 | sys_div: HsiSysDiv::DIV1, // 48Mhz | 285 | sys_div: HsiSysDiv::DIV1, // 48Mhz |
