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authorDario Nieuwenhuis <[email protected]>2023-11-05 03:06:13 +0100
committerDario Nieuwenhuis <[email protected]>2023-11-05 03:06:13 +0100
commit8911a4d8558cd41244af2be2bce2b0969a4ffbea (patch)
tree763b61e264eee44869642d601dcf03852ca1525d /tests
parent056c409443b8280fc951669d15df2fb59521a4d8 (diff)
stm32/rcc: switch to modern api for l0, l1.
Diffstat (limited to 'tests')
-rw-r--r--tests/stm32/src/common.rs26
1 files changed, 14 insertions, 12 deletions
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
index ff808281a..54e23e436 100644
--- a/tests/stm32/src/common.rs
+++ b/tests/stm32/src/common.rs
@@ -460,23 +460,25 @@ pub fn config() -> Config {
460 #[cfg(feature = "stm32l073rz")] 460 #[cfg(feature = "stm32l073rz")]
461 { 461 {
462 use embassy_stm32::rcc::*; 462 use embassy_stm32::rcc::*;
463 config.rcc.mux = ClockSrc::PLL( 463 config.rcc.hsi = true;
464 // 32Mhz clock (16 * 4 / 2) 464 config.rcc.pll = Some(Pll {
465 PLLSource::HSI, 465 source: PLLSource::HSI,
466 PLLMul::MUL4, 466 mul: PLLMul::MUL4,
467 PLLDiv::DIV2, 467 div: PLLDiv::DIV2, // 32Mhz clock (16 * 4 / 2)
468 ); 468 });
469 config.rcc.mux = ClockSrc::PLL1_P;
469 } 470 }
470 471
471 #[cfg(any(feature = "stm32l152re"))] 472 #[cfg(any(feature = "stm32l152re"))]
472 { 473 {
473 use embassy_stm32::rcc::*; 474 use embassy_stm32::rcc::*;
474 config.rcc.mux = ClockSrc::PLL( 475 config.rcc.hsi = true;
475 // 32Mhz clock (16 * 4 / 2) 476 config.rcc.pll = Some(Pll {
476 PLLSource::HSI, 477 source: PLLSource::HSI,
477 PLLMul::MUL4, 478 mul: PLLMul::MUL4,
478 PLLDiv::DIV2, 479 div: PLLDiv::DIV2, // 32Mhz clock (16 * 4 / 2)
479 ); 480 });
481 config.rcc.mux = ClockSrc::PLL1_P;
480 } 482 }
481 483
482 config 484 config