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-rw-r--r--embassy-stm32/src/rcc/bd.rs7
1 files changed, 5 insertions, 2 deletions
diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs
index 4aec3756f..791367954 100644
--- a/embassy-stm32/src/rcc/bd.rs
+++ b/embassy-stm32/src/rcc/bd.rs
@@ -159,6 +159,9 @@ impl LsConfig {
159 } else { 159 } else {
160 None 160 None
161 }; 161 };
162 #[cfg(rcc_u0)]
163 let lse_sysen = Some(lse_en);
164
162 _ = lse_drv; // not all chips have it. 165 _ = lse_drv; // not all chips have it.
163 166
164 // Disable backup domain write protection 167 // Disable backup domain write protection
@@ -199,7 +202,7 @@ impl LsConfig {
199 } 202 }
200 ok &= reg.lseon() == lse_en; 203 ok &= reg.lseon() == lse_en;
201 ok &= reg.lsebyp() == lse_byp; 204 ok &= reg.lsebyp() == lse_byp;
202 #[cfg(any(rcc_l5, rcc_u5, rcc_wle, rcc_wl5, rcc_wba))] 205 #[cfg(any(rcc_l5, rcc_u5, rcc_wle, rcc_wl5, rcc_wba, rcc_u0))]
203 if let Some(lse_sysen) = lse_sysen { 206 if let Some(lse_sysen) = lse_sysen {
204 ok &= reg.lsesysen() == lse_sysen; 207 ok &= reg.lsesysen() == lse_sysen;
205 } 208 }
@@ -251,7 +254,7 @@ impl LsConfig {
251 254
252 while !bdcr().read().lserdy() {} 255 while !bdcr().read().lserdy() {}
253 256
254 #[cfg(any(rcc_l5, rcc_u5, rcc_wle, rcc_wl5, rcc_wba))] 257 #[cfg(any(rcc_l5, rcc_u5, rcc_wle, rcc_wl5, rcc_wba, rcc_u0))]
255 if let Some(lse_sysen) = lse_sysen { 258 if let Some(lse_sysen) = lse_sysen {
256 bdcr().modify(|w| { 259 bdcr().modify(|w| {
257 w.set_lsesysen(lse_sysen); 260 w.set_lsesysen(lse_sysen);