diff options
Diffstat (limited to 'embassy-embedded-hal/src/shared_bus/asynch/spi.rs')
| -rw-r--r-- | embassy-embedded-hal/src/shared_bus/asynch/spi.rs | 70 |
1 files changed, 27 insertions, 43 deletions
diff --git a/embassy-embedded-hal/src/shared_bus/asynch/spi.rs b/embassy-embedded-hal/src/shared_bus/asynch/spi.rs index a3814d6d0..d25716655 100644 --- a/embassy-embedded-hal/src/shared_bus/asynch/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/asynch/spi.rs | |||
| @@ -65,33 +65,25 @@ where | |||
| 65 | { | 65 | { |
| 66 | type Bus = BUS; | 66 | type Bus = BUS; |
| 67 | 67 | ||
| 68 | type TransactionFuture<'a, R, F, Fut> = impl Future<Output = Result<R, Self::Error>> + 'a | 68 | async fn transaction<R, F, Fut>(&mut self, f: F) -> Result<R, Self::Error> |
| 69 | where | 69 | where |
| 70 | Self: 'a, R: 'a, F: FnOnce(*mut Self::Bus) -> Fut + 'a, | 70 | F: FnOnce(*mut Self::Bus) -> Fut, |
| 71 | Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>> + 'a; | 71 | Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>>, |
| 72 | |||
| 73 | fn transaction<'a, R, F, Fut>(&'a mut self, f: F) -> Self::TransactionFuture<'a, R, F, Fut> | ||
| 74 | where | ||
| 75 | R: 'a, | ||
| 76 | F: FnOnce(*mut Self::Bus) -> Fut + 'a, | ||
| 77 | Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>> + 'a, | ||
| 78 | { | 72 | { |
| 79 | async move { | 73 | let mut bus = self.bus.lock().await; |
| 80 | let mut bus = self.bus.lock().await; | 74 | self.cs.set_low().map_err(SpiDeviceError::Cs)?; |
| 81 | self.cs.set_low().map_err(SpiDeviceError::Cs)?; | ||
| 82 | 75 | ||
| 83 | let f_res = f(&mut *bus).await; | 76 | let f_res = f(&mut *bus).await; |
| 84 | 77 | ||
| 85 | // On failure, it's important to still flush and deassert CS. | 78 | // On failure, it's important to still flush and deassert CS. |
| 86 | let flush_res = bus.flush().await; | 79 | let flush_res = bus.flush().await; |
| 87 | let cs_res = self.cs.set_high(); | 80 | let cs_res = self.cs.set_high(); |
| 88 | 81 | ||
| 89 | let f_res = f_res.map_err(SpiDeviceError::Spi)?; | 82 | let f_res = f_res.map_err(SpiDeviceError::Spi)?; |
| 90 | flush_res.map_err(SpiDeviceError::Spi)?; | 83 | flush_res.map_err(SpiDeviceError::Spi)?; |
| 91 | cs_res.map_err(SpiDeviceError::Cs)?; | 84 | cs_res.map_err(SpiDeviceError::Cs)?; |
| 92 | 85 | ||
| 93 | Ok(f_res) | 86 | Ok(f_res) |
| 94 | } | ||
| 95 | } | 87 | } |
| 96 | } | 88 | } |
| 97 | 89 | ||
| @@ -130,33 +122,25 @@ where | |||
| 130 | { | 122 | { |
| 131 | type Bus = BUS; | 123 | type Bus = BUS; |
| 132 | 124 | ||
| 133 | type TransactionFuture<'a, R, F, Fut> = impl Future<Output = Result<R, Self::Error>> + 'a | 125 | async fn transaction<R, F, Fut>(&mut self, f: F) -> Result<R, Self::Error> |
| 134 | where | ||
| 135 | Self: 'a, R: 'a, F: FnOnce(*mut Self::Bus) -> Fut + 'a, | ||
| 136 | Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>> + 'a; | ||
| 137 | |||
| 138 | fn transaction<'a, R, F, Fut>(&'a mut self, f: F) -> Self::TransactionFuture<'a, R, F, Fut> | ||
| 139 | where | 126 | where |
| 140 | R: 'a, | 127 | F: FnOnce(*mut Self::Bus) -> Fut, |
| 141 | F: FnOnce(*mut Self::Bus) -> Fut + 'a, | 128 | Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>>, |
| 142 | Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>> + 'a, | ||
| 143 | { | 129 | { |
| 144 | async move { | 130 | let mut bus = self.bus.lock().await; |
| 145 | let mut bus = self.bus.lock().await; | 131 | bus.set_config(&self.config); |
| 146 | bus.set_config(&self.config); | 132 | self.cs.set_low().map_err(SpiDeviceError::Cs)?; |
| 147 | self.cs.set_low().map_err(SpiDeviceError::Cs)?; | ||
| 148 | 133 | ||
| 149 | let f_res = f(&mut *bus).await; | 134 | let f_res = f(&mut *bus).await; |
| 150 | 135 | ||
| 151 | // On failure, it's important to still flush and deassert CS. | 136 | // On failure, it's important to still flush and deassert CS. |
| 152 | let flush_res = bus.flush().await; | 137 | let flush_res = bus.flush().await; |
| 153 | let cs_res = self.cs.set_high(); | 138 | let cs_res = self.cs.set_high(); |
| 154 | 139 | ||
| 155 | let f_res = f_res.map_err(SpiDeviceError::Spi)?; | 140 | let f_res = f_res.map_err(SpiDeviceError::Spi)?; |
| 156 | flush_res.map_err(SpiDeviceError::Spi)?; | 141 | flush_res.map_err(SpiDeviceError::Spi)?; |
| 157 | cs_res.map_err(SpiDeviceError::Cs)?; | 142 | cs_res.map_err(SpiDeviceError::Cs)?; |
| 158 | 143 | ||
| 159 | Ok(f_res) | 144 | Ok(f_res) |
| 160 | } | ||
| 161 | } | 145 | } |
| 162 | } | 146 | } |
