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Diffstat (limited to 'embassy-embedded-hal/src/shared_bus/asynch/spi.rs')
-rw-r--r--embassy-embedded-hal/src/shared_bus/asynch/spi.rs44
1 files changed, 22 insertions, 22 deletions
diff --git a/embassy-embedded-hal/src/shared_bus/asynch/spi.rs b/embassy-embedded-hal/src/shared_bus/asynch/spi.rs
index 8034c90b5..343184d12 100644
--- a/embassy-embedded-hal/src/shared_bus/asynch/spi.rs
+++ b/embassy-embedded-hal/src/shared_bus/asynch/spi.rs
@@ -3,7 +3,7 @@
3//! # Example (nrf52) 3//! # Example (nrf52)
4//! 4//!
5//! ```rust 5//! ```rust
6//! use embassy_embedded_hal::shared_bus::spi::SpiBusDevice; 6//! use embassy_embedded_hal::shared_bus::spi::SpiDevice;
7//! use embassy::mutex::Mutex; 7//! use embassy::mutex::Mutex;
8//! use embassy::blocking_mutex::raw::ThreadModeRawMutex; 8//! use embassy::blocking_mutex::raw::ThreadModeRawMutex;
9//! 9//!
@@ -17,12 +17,12 @@
17//! 17//!
18//! // Device 1, using embedded-hal-async compatible driver for ST7735 LCD display 18//! // Device 1, using embedded-hal-async compatible driver for ST7735 LCD display
19//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard); 19//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
20//! let spi_dev1 = SpiBusDevice::new(spi_bus, cs_pin1); 20//! let spi_dev1 = SpiDevice::new(spi_bus, cs_pin1);
21//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), 160, 128); 21//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), 160, 128);
22//! 22//!
23//! // Device 2 23//! // Device 2
24//! let cs_pin2 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard); 24//! let cs_pin2 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
25//! let spi_dev2 = SpiBusDevice::new(spi_bus, cs_pin2); 25//! let spi_dev2 = SpiDevice::new(spi_bus, cs_pin2);
26//! let display2 = ST7735::new(spi_dev2, dc2, rst2, Default::default(), 160, 128); 26//! let display2 = ST7735::new(spi_dev2, dc2, rst2, Default::default(), 160, 128);
27//! ``` 27//! ```
28use core::future::Future; 28use core::future::Future;
@@ -33,29 +33,29 @@ use embedded_hal_1::digital::blocking::OutputPin;
33use embedded_hal_1::spi::ErrorType; 33use embedded_hal_1::spi::ErrorType;
34use embedded_hal_async::spi; 34use embedded_hal_async::spi;
35 35
36use crate::shared_bus::SpiBusDeviceError; 36use crate::shared_bus::SpiDeviceError;
37use crate::SetConfig; 37use crate::SetConfig;
38 38
39pub struct SpiBusDevice<'a, M: RawMutex, BUS, CS> { 39pub struct SpiDevice<'a, M: RawMutex, BUS, CS> {
40 bus: &'a Mutex<M, BUS>, 40 bus: &'a Mutex<M, BUS>,
41 cs: CS, 41 cs: CS,
42} 42}
43 43
44impl<'a, M: RawMutex, BUS, CS> SpiBusDevice<'a, M, BUS, CS> { 44impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS> {
45 pub fn new(bus: &'a Mutex<M, BUS>, cs: CS) -> Self { 45 pub fn new(bus: &'a Mutex<M, BUS>, cs: CS) -> Self {
46 Self { bus, cs } 46 Self { bus, cs }
47 } 47 }
48} 48}
49 49
50impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiBusDevice<'a, M, BUS, CS> 50impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS>
51where 51where
52 BUS: spi::ErrorType, 52 BUS: spi::ErrorType,
53 CS: OutputPin, 53 CS: OutputPin,
54{ 54{
55 type Error = SpiBusDeviceError<BUS::Error, CS::Error>; 55 type Error = SpiDeviceError<BUS::Error, CS::Error>;
56} 56}
57 57
58impl<M, BUS, CS> spi::SpiDevice for SpiBusDevice<'_, M, BUS, CS> 58impl<M, BUS, CS> spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
59where 59where
60 M: RawMutex + 'static, 60 M: RawMutex + 'static,
61 BUS: spi::SpiBusFlush + 'static, 61 BUS: spi::SpiBusFlush + 'static,
@@ -76,7 +76,7 @@ where
76 { 76 {
77 async move { 77 async move {
78 let mut bus = self.bus.lock().await; 78 let mut bus = self.bus.lock().await;
79 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 79 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
80 80
81 let f_res = f(&mut *bus).await; 81 let f_res = f(&mut *bus).await;
82 82
@@ -84,37 +84,37 @@ where
84 let flush_res = bus.flush().await; 84 let flush_res = bus.flush().await;
85 let cs_res = self.cs.set_high(); 85 let cs_res = self.cs.set_high();
86 86
87 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 87 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
88 flush_res.map_err(SpiBusDeviceError::Spi)?; 88 flush_res.map_err(SpiDeviceError::Spi)?;
89 cs_res.map_err(SpiBusDeviceError::Cs)?; 89 cs_res.map_err(SpiDeviceError::Cs)?;
90 90
91 Ok(f_res) 91 Ok(f_res)
92 } 92 }
93 } 93 }
94} 94}
95 95
96pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> { 96pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
97 bus: &'a Mutex<M, BUS>, 97 bus: &'a Mutex<M, BUS>,
98 cs: CS, 98 cs: CS,
99 config: BUS::Config, 99 config: BUS::Config,
100} 100}
101 101
102impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiBusDeviceWithConfig<'a, M, BUS, CS> { 102impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> {
103 pub fn new(bus: &'a Mutex<M, BUS>, cs: CS, config: BUS::Config) -> Self { 103 pub fn new(bus: &'a Mutex<M, BUS>, cs: CS, config: BUS::Config) -> Self {
104 Self { bus, cs, config } 104 Self { bus, cs, config }
105 } 105 }
106} 106}
107 107
108impl<'a, M, BUS, CS> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS> 108impl<'a, M, BUS, CS> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS>
109where 109where
110 BUS: spi::ErrorType + SetConfig, 110 BUS: spi::ErrorType + SetConfig,
111 CS: OutputPin, 111 CS: OutputPin,
112 M: RawMutex, 112 M: RawMutex,
113{ 113{
114 type Error = SpiBusDeviceError<BUS::Error, CS::Error>; 114 type Error = SpiDeviceError<BUS::Error, CS::Error>;
115} 115}
116 116
117impl<M, BUS, CS> spi::SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS> 117impl<M, BUS, CS> spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
118where 118where
119 M: RawMutex + 'static, 119 M: RawMutex + 'static,
120 BUS: spi::SpiBusFlush + SetConfig + 'static, 120 BUS: spi::SpiBusFlush + SetConfig + 'static,
@@ -136,7 +136,7 @@ where
136 async move { 136 async move {
137 let mut bus = self.bus.lock().await; 137 let mut bus = self.bus.lock().await;
138 bus.set_config(&self.config); 138 bus.set_config(&self.config);
139 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 139 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
140 140
141 let f_res = f(&mut *bus).await; 141 let f_res = f(&mut *bus).await;
142 142
@@ -144,9 +144,9 @@ where
144 let flush_res = bus.flush().await; 144 let flush_res = bus.flush().await;
145 let cs_res = self.cs.set_high(); 145 let cs_res = self.cs.set_high();
146 146
147 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 147 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
148 flush_res.map_err(SpiBusDeviceError::Spi)?; 148 flush_res.map_err(SpiDeviceError::Spi)?;
149 cs_res.map_err(SpiBusDeviceError::Cs)?; 149 cs_res.map_err(SpiDeviceError::Cs)?;
150 150
151 Ok(f_res) 151 Ok(f_res)
152 } 152 }