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-rw-r--r--embassy-embedded-hal/src/shared_bus/asynch/i2c.rs40
-rw-r--r--embassy-embedded-hal/src/shared_bus/asynch/spi.rs44
-rw-r--r--embassy-embedded-hal/src/shared_bus/blocking/i2c.rs56
-rw-r--r--embassy-embedded-hal/src/shared_bus/blocking/spi.rs64
-rw-r--r--embassy-embedded-hal/src/shared_bus/mod.rs8
5 files changed, 106 insertions, 106 deletions
diff --git a/embassy-embedded-hal/src/shared_bus/asynch/i2c.rs b/embassy-embedded-hal/src/shared_bus/asynch/i2c.rs
index 136117920..5bd3d9bc5 100644
--- a/embassy-embedded-hal/src/shared_bus/asynch/i2c.rs
+++ b/embassy-embedded-hal/src/shared_bus/asynch/i2c.rs
@@ -3,7 +3,7 @@
3//! # Example (nrf52) 3//! # Example (nrf52)
4//! 4//!
5//! ```rust 5//! ```rust
6//! use embassy_embedded_hal::shared_bus::i2c::I2cBusDevice; 6//! use embassy_embedded_hal::shared_bus::i2c::I2cDevice;
7//! use embassy::mutex::Mutex; 7//! use embassy::mutex::Mutex;
8//! use embassy::blocking_mutex::raw::ThreadModeRawMutex; 8//! use embassy::blocking_mutex::raw::ThreadModeRawMutex;
9//! 9//!
@@ -15,11 +15,11 @@
15//! let i2c_bus = I2C_BUS.put(i2c_bus); 15//! let i2c_bus = I2C_BUS.put(i2c_bus);
16//! 16//!
17//! // Device 1, using embedded-hal-async compatible driver for QMC5883L compass 17//! // Device 1, using embedded-hal-async compatible driver for QMC5883L compass
18//! let i2c_dev1 = I2cBusDevice::new(i2c_bus); 18//! let i2c_dev1 = I2cDevice::new(i2c_bus);
19//! let compass = QMC5883L::new(i2c_dev1).await.unwrap(); 19//! let compass = QMC5883L::new(i2c_dev1).await.unwrap();
20//! 20//!
21//! // Device 2, using embedded-hal-async compatible driver for Mpu6050 accelerometer 21//! // Device 2, using embedded-hal-async compatible driver for Mpu6050 accelerometer
22//! let i2c_dev2 = I2cBusDevice::new(i2c_bus); 22//! let i2c_dev2 = I2cDevice::new(i2c_bus);
23//! let mpu = Mpu6050::new(i2c_dev2); 23//! let mpu = Mpu6050::new(i2c_dev2);
24//! ``` 24//! ```
25use core::future::Future; 25use core::future::Future;
@@ -28,27 +28,27 @@ use embassy::blocking_mutex::raw::RawMutex;
28use embassy::mutex::Mutex; 28use embassy::mutex::Mutex;
29use embedded_hal_async::i2c; 29use embedded_hal_async::i2c;
30 30
31use crate::shared_bus::I2cBusDeviceError; 31use crate::shared_bus::I2cDeviceError;
32use crate::SetConfig; 32use crate::SetConfig;
33 33
34pub struct I2cBusDevice<'a, M: RawMutex, BUS> { 34pub struct I2cDevice<'a, M: RawMutex, BUS> {
35 bus: &'a Mutex<M, BUS>, 35 bus: &'a Mutex<M, BUS>,
36} 36}
37 37
38impl<'a, M: RawMutex, BUS> I2cBusDevice<'a, M, BUS> { 38impl<'a, M: RawMutex, BUS> I2cDevice<'a, M, BUS> {
39 pub fn new(bus: &'a Mutex<M, BUS>) -> Self { 39 pub fn new(bus: &'a Mutex<M, BUS>) -> Self {
40 Self { bus } 40 Self { bus }
41 } 41 }
42} 42}
43 43
44impl<'a, M: RawMutex, BUS> i2c::ErrorType for I2cBusDevice<'a, M, BUS> 44impl<'a, M: RawMutex, BUS> i2c::ErrorType for I2cDevice<'a, M, BUS>
45where 45where
46 BUS: i2c::ErrorType, 46 BUS: i2c::ErrorType,
47{ 47{
48 type Error = I2cBusDeviceError<BUS::Error>; 48 type Error = I2cDeviceError<BUS::Error>;
49} 49}
50 50
51impl<M, BUS> i2c::I2c for I2cBusDevice<'_, M, BUS> 51impl<M, BUS> i2c::I2c for I2cDevice<'_, M, BUS>
52where 52where
53 M: RawMutex + 'static, 53 M: RawMutex + 'static,
54 BUS: i2c::I2c + 'static, 54 BUS: i2c::I2c + 'static,
@@ -58,7 +58,7 @@ where
58 fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> { 58 fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
59 async move { 59 async move {
60 let mut bus = self.bus.lock().await; 60 let mut bus = self.bus.lock().await;
61 bus.read(address, buffer).await.map_err(I2cBusDeviceError::I2c)?; 61 bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
62 Ok(()) 62 Ok(())
63 } 63 }
64 } 64 }
@@ -68,7 +68,7 @@ where
68 fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Self::WriteFuture<'a> { 68 fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Self::WriteFuture<'a> {
69 async move { 69 async move {
70 let mut bus = self.bus.lock().await; 70 let mut bus = self.bus.lock().await;
71 bus.write(address, bytes).await.map_err(I2cBusDeviceError::I2c)?; 71 bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
72 Ok(()) 72 Ok(())
73 } 73 }
74 } 74 }
@@ -85,7 +85,7 @@ where
85 let mut bus = self.bus.lock().await; 85 let mut bus = self.bus.lock().await;
86 bus.write_read(address, wr_buffer, rd_buffer) 86 bus.write_read(address, wr_buffer, rd_buffer)
87 .await 87 .await
88 .map_err(I2cBusDeviceError::I2c)?; 88 .map_err(I2cDeviceError::I2c)?;
89 Ok(()) 89 Ok(())
90 } 90 }
91 } 91 }
@@ -103,27 +103,27 @@ where
103 } 103 }
104} 104}
105 105
106pub struct I2cBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> { 106pub struct I2cDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> {
107 bus: &'a Mutex<M, BUS>, 107 bus: &'a Mutex<M, BUS>,
108 config: BUS::Config, 108 config: BUS::Config,
109} 109}
110 110
111impl<'a, M: RawMutex, BUS: SetConfig> I2cBusDeviceWithConfig<'a, M, BUS> { 111impl<'a, M: RawMutex, BUS: SetConfig> I2cDeviceWithConfig<'a, M, BUS> {
112 pub fn new(bus: &'a Mutex<M, BUS>, config: BUS::Config) -> Self { 112 pub fn new(bus: &'a Mutex<M, BUS>, config: BUS::Config) -> Self {
113 Self { bus, config } 113 Self { bus, config }
114 } 114 }
115} 115}
116 116
117impl<'a, M, BUS> i2c::ErrorType for I2cBusDeviceWithConfig<'a, M, BUS> 117impl<'a, M, BUS> i2c::ErrorType for I2cDeviceWithConfig<'a, M, BUS>
118where 118where
119 BUS: i2c::ErrorType, 119 BUS: i2c::ErrorType,
120 M: RawMutex, 120 M: RawMutex,
121 BUS: SetConfig, 121 BUS: SetConfig,
122{ 122{
123 type Error = I2cBusDeviceError<BUS::Error>; 123 type Error = I2cDeviceError<BUS::Error>;
124} 124}
125 125
126impl<M, BUS> i2c::I2c for I2cBusDeviceWithConfig<'_, M, BUS> 126impl<M, BUS> i2c::I2c for I2cDeviceWithConfig<'_, M, BUS>
127where 127where
128 M: RawMutex + 'static, 128 M: RawMutex + 'static,
129 BUS: i2c::I2c + SetConfig + 'static, 129 BUS: i2c::I2c + SetConfig + 'static,
@@ -134,7 +134,7 @@ where
134 async move { 134 async move {
135 let mut bus = self.bus.lock().await; 135 let mut bus = self.bus.lock().await;
136 bus.set_config(&self.config); 136 bus.set_config(&self.config);
137 bus.read(address, buffer).await.map_err(I2cBusDeviceError::I2c)?; 137 bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
138 Ok(()) 138 Ok(())
139 } 139 }
140 } 140 }
@@ -145,7 +145,7 @@ where
145 async move { 145 async move {
146 let mut bus = self.bus.lock().await; 146 let mut bus = self.bus.lock().await;
147 bus.set_config(&self.config); 147 bus.set_config(&self.config);
148 bus.write(address, bytes).await.map_err(I2cBusDeviceError::I2c)?; 148 bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
149 Ok(()) 149 Ok(())
150 } 150 }
151 } 151 }
@@ -163,7 +163,7 @@ where
163 bus.set_config(&self.config); 163 bus.set_config(&self.config);
164 bus.write_read(address, wr_buffer, rd_buffer) 164 bus.write_read(address, wr_buffer, rd_buffer)
165 .await 165 .await
166 .map_err(I2cBusDeviceError::I2c)?; 166 .map_err(I2cDeviceError::I2c)?;
167 Ok(()) 167 Ok(())
168 } 168 }
169 } 169 }
diff --git a/embassy-embedded-hal/src/shared_bus/asynch/spi.rs b/embassy-embedded-hal/src/shared_bus/asynch/spi.rs
index 8034c90b5..343184d12 100644
--- a/embassy-embedded-hal/src/shared_bus/asynch/spi.rs
+++ b/embassy-embedded-hal/src/shared_bus/asynch/spi.rs
@@ -3,7 +3,7 @@
3//! # Example (nrf52) 3//! # Example (nrf52)
4//! 4//!
5//! ```rust 5//! ```rust
6//! use embassy_embedded_hal::shared_bus::spi::SpiBusDevice; 6//! use embassy_embedded_hal::shared_bus::spi::SpiDevice;
7//! use embassy::mutex::Mutex; 7//! use embassy::mutex::Mutex;
8//! use embassy::blocking_mutex::raw::ThreadModeRawMutex; 8//! use embassy::blocking_mutex::raw::ThreadModeRawMutex;
9//! 9//!
@@ -17,12 +17,12 @@
17//! 17//!
18//! // Device 1, using embedded-hal-async compatible driver for ST7735 LCD display 18//! // Device 1, using embedded-hal-async compatible driver for ST7735 LCD display
19//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard); 19//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
20//! let spi_dev1 = SpiBusDevice::new(spi_bus, cs_pin1); 20//! let spi_dev1 = SpiDevice::new(spi_bus, cs_pin1);
21//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), 160, 128); 21//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), 160, 128);
22//! 22//!
23//! // Device 2 23//! // Device 2
24//! let cs_pin2 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard); 24//! let cs_pin2 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
25//! let spi_dev2 = SpiBusDevice::new(spi_bus, cs_pin2); 25//! let spi_dev2 = SpiDevice::new(spi_bus, cs_pin2);
26//! let display2 = ST7735::new(spi_dev2, dc2, rst2, Default::default(), 160, 128); 26//! let display2 = ST7735::new(spi_dev2, dc2, rst2, Default::default(), 160, 128);
27//! ``` 27//! ```
28use core::future::Future; 28use core::future::Future;
@@ -33,29 +33,29 @@ use embedded_hal_1::digital::blocking::OutputPin;
33use embedded_hal_1::spi::ErrorType; 33use embedded_hal_1::spi::ErrorType;
34use embedded_hal_async::spi; 34use embedded_hal_async::spi;
35 35
36use crate::shared_bus::SpiBusDeviceError; 36use crate::shared_bus::SpiDeviceError;
37use crate::SetConfig; 37use crate::SetConfig;
38 38
39pub struct SpiBusDevice<'a, M: RawMutex, BUS, CS> { 39pub struct SpiDevice<'a, M: RawMutex, BUS, CS> {
40 bus: &'a Mutex<M, BUS>, 40 bus: &'a Mutex<M, BUS>,
41 cs: CS, 41 cs: CS,
42} 42}
43 43
44impl<'a, M: RawMutex, BUS, CS> SpiBusDevice<'a, M, BUS, CS> { 44impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS> {
45 pub fn new(bus: &'a Mutex<M, BUS>, cs: CS) -> Self { 45 pub fn new(bus: &'a Mutex<M, BUS>, cs: CS) -> Self {
46 Self { bus, cs } 46 Self { bus, cs }
47 } 47 }
48} 48}
49 49
50impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiBusDevice<'a, M, BUS, CS> 50impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS>
51where 51where
52 BUS: spi::ErrorType, 52 BUS: spi::ErrorType,
53 CS: OutputPin, 53 CS: OutputPin,
54{ 54{
55 type Error = SpiBusDeviceError<BUS::Error, CS::Error>; 55 type Error = SpiDeviceError<BUS::Error, CS::Error>;
56} 56}
57 57
58impl<M, BUS, CS> spi::SpiDevice for SpiBusDevice<'_, M, BUS, CS> 58impl<M, BUS, CS> spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
59where 59where
60 M: RawMutex + 'static, 60 M: RawMutex + 'static,
61 BUS: spi::SpiBusFlush + 'static, 61 BUS: spi::SpiBusFlush + 'static,
@@ -76,7 +76,7 @@ where
76 { 76 {
77 async move { 77 async move {
78 let mut bus = self.bus.lock().await; 78 let mut bus = self.bus.lock().await;
79 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 79 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
80 80
81 let f_res = f(&mut *bus).await; 81 let f_res = f(&mut *bus).await;
82 82
@@ -84,37 +84,37 @@ where
84 let flush_res = bus.flush().await; 84 let flush_res = bus.flush().await;
85 let cs_res = self.cs.set_high(); 85 let cs_res = self.cs.set_high();
86 86
87 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 87 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
88 flush_res.map_err(SpiBusDeviceError::Spi)?; 88 flush_res.map_err(SpiDeviceError::Spi)?;
89 cs_res.map_err(SpiBusDeviceError::Cs)?; 89 cs_res.map_err(SpiDeviceError::Cs)?;
90 90
91 Ok(f_res) 91 Ok(f_res)
92 } 92 }
93 } 93 }
94} 94}
95 95
96pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> { 96pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
97 bus: &'a Mutex<M, BUS>, 97 bus: &'a Mutex<M, BUS>,
98 cs: CS, 98 cs: CS,
99 config: BUS::Config, 99 config: BUS::Config,
100} 100}
101 101
102impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiBusDeviceWithConfig<'a, M, BUS, CS> { 102impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> {
103 pub fn new(bus: &'a Mutex<M, BUS>, cs: CS, config: BUS::Config) -> Self { 103 pub fn new(bus: &'a Mutex<M, BUS>, cs: CS, config: BUS::Config) -> Self {
104 Self { bus, cs, config } 104 Self { bus, cs, config }
105 } 105 }
106} 106}
107 107
108impl<'a, M, BUS, CS> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS> 108impl<'a, M, BUS, CS> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS>
109where 109where
110 BUS: spi::ErrorType + SetConfig, 110 BUS: spi::ErrorType + SetConfig,
111 CS: OutputPin, 111 CS: OutputPin,
112 M: RawMutex, 112 M: RawMutex,
113{ 113{
114 type Error = SpiBusDeviceError<BUS::Error, CS::Error>; 114 type Error = SpiDeviceError<BUS::Error, CS::Error>;
115} 115}
116 116
117impl<M, BUS, CS> spi::SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS> 117impl<M, BUS, CS> spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
118where 118where
119 M: RawMutex + 'static, 119 M: RawMutex + 'static,
120 BUS: spi::SpiBusFlush + SetConfig + 'static, 120 BUS: spi::SpiBusFlush + SetConfig + 'static,
@@ -136,7 +136,7 @@ where
136 async move { 136 async move {
137 let mut bus = self.bus.lock().await; 137 let mut bus = self.bus.lock().await;
138 bus.set_config(&self.config); 138 bus.set_config(&self.config);
139 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 139 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
140 140
141 let f_res = f(&mut *bus).await; 141 let f_res = f(&mut *bus).await;
142 142
@@ -144,9 +144,9 @@ where
144 let flush_res = bus.flush().await; 144 let flush_res = bus.flush().await;
145 let cs_res = self.cs.set_high(); 145 let cs_res = self.cs.set_high();
146 146
147 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 147 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
148 flush_res.map_err(SpiBusDeviceError::Spi)?; 148 flush_res.map_err(SpiDeviceError::Spi)?;
149 cs_res.map_err(SpiBusDeviceError::Cs)?; 149 cs_res.map_err(SpiDeviceError::Cs)?;
150 150
151 Ok(f_res) 151 Ok(f_res)
152 } 152 }
diff --git a/embassy-embedded-hal/src/shared_bus/blocking/i2c.rs b/embassy-embedded-hal/src/shared_bus/blocking/i2c.rs
index ac361a786..1ec480c0c 100644
--- a/embassy-embedded-hal/src/shared_bus/blocking/i2c.rs
+++ b/embassy-embedded-hal/src/shared_bus/blocking/i2c.rs
@@ -3,7 +3,7 @@
3//! # Example (nrf52) 3//! # Example (nrf52)
4//! 4//!
5//! ```rust 5//! ```rust
6//! use embassy_embedded_hal::shared_bus::blocking::i2c::I2cBusDevice; 6//! use embassy_embedded_hal::shared_bus::blocking::i2c::I2cDevice;
7//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex}; 7//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex};
8//! 8//!
9//! static I2C_BUS: Forever<NoopMutex<RefCell<Twim<TWISPI0>>>> = Forever::new(); 9//! static I2C_BUS: Forever<NoopMutex<RefCell<Twim<TWISPI0>>>> = Forever::new();
@@ -12,7 +12,7 @@
12//! let i2c_bus = NoopMutex::new(RefCell::new(i2c)); 12//! let i2c_bus = NoopMutex::new(RefCell::new(i2c));
13//! let i2c_bus = I2C_BUS.put(i2c_bus); 13//! let i2c_bus = I2C_BUS.put(i2c_bus);
14//! 14//!
15//! let i2c_dev1 = I2cBusDevice::new(i2c_bus); 15//! let i2c_dev1 = I2cDevice::new(i2c_bus);
16//! let mpu = Mpu6050::new(i2c_dev1); 16//! let mpu = Mpu6050::new(i2c_dev1);
17//! ``` 17//! ```
18 18
@@ -23,46 +23,46 @@ use embassy::blocking_mutex::Mutex;
23use embedded_hal_1::i2c::blocking::{I2c, Operation}; 23use embedded_hal_1::i2c::blocking::{I2c, Operation};
24use embedded_hal_1::i2c::ErrorType; 24use embedded_hal_1::i2c::ErrorType;
25 25
26use crate::shared_bus::I2cBusDeviceError; 26use crate::shared_bus::I2cDeviceError;
27use crate::SetConfig; 27use crate::SetConfig;
28 28
29pub struct I2cBusDevice<'a, M: RawMutex, BUS> { 29pub struct I2cDevice<'a, M: RawMutex, BUS> {
30 bus: &'a Mutex<M, RefCell<BUS>>, 30 bus: &'a Mutex<M, RefCell<BUS>>,
31} 31}
32 32
33impl<'a, M: RawMutex, BUS> I2cBusDevice<'a, M, BUS> { 33impl<'a, M: RawMutex, BUS> I2cDevice<'a, M, BUS> {
34 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>) -> Self { 34 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>) -> Self {
35 Self { bus } 35 Self { bus }
36 } 36 }
37} 37}
38 38
39impl<'a, M: RawMutex, BUS> ErrorType for I2cBusDevice<'a, M, BUS> 39impl<'a, M: RawMutex, BUS> ErrorType for I2cDevice<'a, M, BUS>
40where 40where
41 BUS: ErrorType, 41 BUS: ErrorType,
42{ 42{
43 type Error = I2cBusDeviceError<BUS::Error>; 43 type Error = I2cDeviceError<BUS::Error>;
44} 44}
45 45
46impl<M, BUS> I2c for I2cBusDevice<'_, M, BUS> 46impl<M, BUS> I2c for I2cDevice<'_, M, BUS>
47where 47where
48 M: RawMutex, 48 M: RawMutex,
49 BUS: I2c, 49 BUS: I2c,
50{ 50{
51 fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { 51 fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
52 self.bus 52 self.bus
53 .lock(|bus| bus.borrow_mut().read(address, buffer).map_err(I2cBusDeviceError::I2c)) 53 .lock(|bus| bus.borrow_mut().read(address, buffer).map_err(I2cDeviceError::I2c))
54 } 54 }
55 55
56 fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> { 56 fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
57 self.bus 57 self.bus
58 .lock(|bus| bus.borrow_mut().write(address, bytes).map_err(I2cBusDeviceError::I2c)) 58 .lock(|bus| bus.borrow_mut().write(address, bytes).map_err(I2cDeviceError::I2c))
59 } 59 }
60 60
61 fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> { 61 fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
62 self.bus.lock(|bus| { 62 self.bus.lock(|bus| {
63 bus.borrow_mut() 63 bus.borrow_mut()
64 .write_read(address, wr_buffer, rd_buffer) 64 .write_read(address, wr_buffer, rd_buffer)
65 .map_err(I2cBusDeviceError::I2c) 65 .map_err(I2cDeviceError::I2c)
66 }) 66 })
67 } 67 }
68 68
@@ -101,68 +101,68 @@ where
101 } 101 }
102} 102}
103 103
104impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Write for I2cBusDevice<'_, M, BUS> 104impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Write for I2cDevice<'_, M, BUS>
105where 105where
106 M: RawMutex, 106 M: RawMutex,
107 BUS: embedded_hal_02::blocking::i2c::Write<Error = E>, 107 BUS: embedded_hal_02::blocking::i2c::Write<Error = E>,
108{ 108{
109 type Error = I2cBusDeviceError<E>; 109 type Error = I2cDeviceError<E>;
110 110
111 fn write<'w>(&mut self, addr: u8, bytes: &'w [u8]) -> Result<(), Self::Error> { 111 fn write<'w>(&mut self, addr: u8, bytes: &'w [u8]) -> Result<(), Self::Error> {
112 self.bus 112 self.bus
113 .lock(|bus| bus.borrow_mut().write(addr, bytes).map_err(I2cBusDeviceError::I2c)) 113 .lock(|bus| bus.borrow_mut().write(addr, bytes).map_err(I2cDeviceError::I2c))
114 } 114 }
115} 115}
116 116
117impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Read for I2cBusDevice<'_, M, BUS> 117impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Read for I2cDevice<'_, M, BUS>
118where 118where
119 M: RawMutex, 119 M: RawMutex,
120 BUS: embedded_hal_02::blocking::i2c::Read<Error = E>, 120 BUS: embedded_hal_02::blocking::i2c::Read<Error = E>,
121{ 121{
122 type Error = I2cBusDeviceError<E>; 122 type Error = I2cDeviceError<E>;
123 123
124 fn read<'w>(&mut self, addr: u8, bytes: &'w mut [u8]) -> Result<(), Self::Error> { 124 fn read<'w>(&mut self, addr: u8, bytes: &'w mut [u8]) -> Result<(), Self::Error> {
125 self.bus 125 self.bus
126 .lock(|bus| bus.borrow_mut().read(addr, bytes).map_err(I2cBusDeviceError::I2c)) 126 .lock(|bus| bus.borrow_mut().read(addr, bytes).map_err(I2cDeviceError::I2c))
127 } 127 }
128} 128}
129 129
130impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::WriteRead for I2cBusDevice<'_, M, BUS> 130impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::WriteRead for I2cDevice<'_, M, BUS>
131where 131where
132 M: RawMutex, 132 M: RawMutex,
133 BUS: embedded_hal_02::blocking::i2c::WriteRead<Error = E>, 133 BUS: embedded_hal_02::blocking::i2c::WriteRead<Error = E>,
134{ 134{
135 type Error = I2cBusDeviceError<E>; 135 type Error = I2cDeviceError<E>;
136 136
137 fn write_read<'w>(&mut self, addr: u8, bytes: &'w [u8], buffer: &'w mut [u8]) -> Result<(), Self::Error> { 137 fn write_read<'w>(&mut self, addr: u8, bytes: &'w [u8], buffer: &'w mut [u8]) -> Result<(), Self::Error> {
138 self.bus.lock(|bus| { 138 self.bus.lock(|bus| {
139 bus.borrow_mut() 139 bus.borrow_mut()
140 .write_read(addr, bytes, buffer) 140 .write_read(addr, bytes, buffer)
141 .map_err(I2cBusDeviceError::I2c) 141 .map_err(I2cDeviceError::I2c)
142 }) 142 })
143 } 143 }
144} 144}
145 145
146pub struct I2cBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> { 146pub struct I2cDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> {
147 bus: &'a Mutex<M, RefCell<BUS>>, 147 bus: &'a Mutex<M, RefCell<BUS>>,
148 config: BUS::Config, 148 config: BUS::Config,
149} 149}
150 150
151impl<'a, M: RawMutex, BUS: SetConfig> I2cBusDeviceWithConfig<'a, M, BUS> { 151impl<'a, M: RawMutex, BUS: SetConfig> I2cDeviceWithConfig<'a, M, BUS> {
152 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, config: BUS::Config) -> Self { 152 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, config: BUS::Config) -> Self {
153 Self { bus, config } 153 Self { bus, config }
154 } 154 }
155} 155}
156 156
157impl<'a, M, BUS> ErrorType for I2cBusDeviceWithConfig<'a, M, BUS> 157impl<'a, M, BUS> ErrorType for I2cDeviceWithConfig<'a, M, BUS>
158where 158where
159 M: RawMutex, 159 M: RawMutex,
160 BUS: ErrorType + SetConfig, 160 BUS: ErrorType + SetConfig,
161{ 161{
162 type Error = I2cBusDeviceError<BUS::Error>; 162 type Error = I2cDeviceError<BUS::Error>;
163} 163}
164 164
165impl<M, BUS> I2c for I2cBusDeviceWithConfig<'_, M, BUS> 165impl<M, BUS> I2c for I2cDeviceWithConfig<'_, M, BUS>
166where 166where
167 M: RawMutex, 167 M: RawMutex,
168 BUS: I2c + SetConfig, 168 BUS: I2c + SetConfig,
@@ -171,7 +171,7 @@ where
171 self.bus.lock(|bus| { 171 self.bus.lock(|bus| {
172 let mut bus = bus.borrow_mut(); 172 let mut bus = bus.borrow_mut();
173 bus.set_config(&self.config); 173 bus.set_config(&self.config);
174 bus.read(address, buffer).map_err(I2cBusDeviceError::I2c) 174 bus.read(address, buffer).map_err(I2cDeviceError::I2c)
175 }) 175 })
176 } 176 }
177 177
@@ -179,7 +179,7 @@ where
179 self.bus.lock(|bus| { 179 self.bus.lock(|bus| {
180 let mut bus = bus.borrow_mut(); 180 let mut bus = bus.borrow_mut();
181 bus.set_config(&self.config); 181 bus.set_config(&self.config);
182 bus.write(address, bytes).map_err(I2cBusDeviceError::I2c) 182 bus.write(address, bytes).map_err(I2cDeviceError::I2c)
183 }) 183 })
184 } 184 }
185 185
@@ -188,7 +188,7 @@ where
188 let mut bus = bus.borrow_mut(); 188 let mut bus = bus.borrow_mut();
189 bus.set_config(&self.config); 189 bus.set_config(&self.config);
190 bus.write_read(address, wr_buffer, rd_buffer) 190 bus.write_read(address, wr_buffer, rd_buffer)
191 .map_err(I2cBusDeviceError::I2c) 191 .map_err(I2cDeviceError::I2c)
192 }) 192 })
193 } 193 }
194 194
diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
index 704858cdb..ff92e1a7e 100644
--- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
+++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
@@ -3,7 +3,7 @@
3//! # Example (nrf52) 3//! # Example (nrf52)
4//! 4//!
5//! ```rust 5//! ```rust
6//! use embassy_embedded_hal::shared_bus::blocking::spi::SpiBusDevice; 6//! use embassy_embedded_hal::shared_bus::blocking::spi::SpiDevice;
7//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex}; 7//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex};
8//! 8//!
9//! static SPI_BUS: Forever<NoopMutex<RefCell<Spim<SPI3>>>> = Forever::new(); 9//! static SPI_BUS: Forever<NoopMutex<RefCell<Spim<SPI3>>>> = Forever::new();
@@ -14,7 +14,7 @@
14//! 14//!
15//! // Device 1, using embedded-hal compatible driver for ST7735 LCD display 15//! // Device 1, using embedded-hal compatible driver for ST7735 LCD display
16//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard); 16//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
17//! let spi_dev1 = SpiBusDevice::new(spi_bus, cs_pin1); 17//! let spi_dev1 = SpiDevice::new(spi_bus, cs_pin1);
18//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), false, 160, 128); 18//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), false, 160, 128);
19//! ``` 19//! ```
20 20
@@ -24,31 +24,31 @@ use embassy::blocking_mutex::raw::RawMutex;
24use embassy::blocking_mutex::Mutex; 24use embassy::blocking_mutex::Mutex;
25use embedded_hal_1::digital::blocking::OutputPin; 25use embedded_hal_1::digital::blocking::OutputPin;
26use embedded_hal_1::spi; 26use embedded_hal_1::spi;
27use embedded_hal_1::spi::blocking::{SpiBusFlush, SpiDevice}; 27use embedded_hal_1::spi::blocking::SpiBusFlush;
28 28
29use crate::shared_bus::SpiBusDeviceError; 29use crate::shared_bus::SpiDeviceError;
30use crate::SetConfig; 30use crate::SetConfig;
31 31
32pub struct SpiBusDevice<'a, M: RawMutex, BUS, CS> { 32pub struct SpiDevice<'a, M: RawMutex, BUS, CS> {
33 bus: &'a Mutex<M, RefCell<BUS>>, 33 bus: &'a Mutex<M, RefCell<BUS>>,
34 cs: CS, 34 cs: CS,
35} 35}
36 36
37impl<'a, M: RawMutex, BUS, CS> SpiBusDevice<'a, M, BUS, CS> { 37impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS> {
38 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self { 38 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self {
39 Self { bus, cs } 39 Self { bus, cs }
40 } 40 }
41} 41}
42 42
43impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiBusDevice<'a, M, BUS, CS> 43impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS>
44where 44where
45 BUS: spi::ErrorType, 45 BUS: spi::ErrorType,
46 CS: OutputPin, 46 CS: OutputPin,
47{ 47{
48 type Error = SpiBusDeviceError<BUS::Error, CS::Error>; 48 type Error = SpiDeviceError<BUS::Error, CS::Error>;
49} 49}
50 50
51impl<BUS, M, CS> SpiDevice for SpiBusDevice<'_, M, BUS, CS> 51impl<BUS, M, CS> embedded_hal_1::spi::blocking::SpiDevice for SpiDevice<'_, M, BUS, CS>
52where 52where
53 M: RawMutex, 53 M: RawMutex,
54 BUS: SpiBusFlush, 54 BUS: SpiBusFlush,
@@ -59,7 +59,7 @@ where
59 fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> { 59 fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
60 self.bus.lock(|bus| { 60 self.bus.lock(|bus| {
61 let mut bus = bus.borrow_mut(); 61 let mut bus = bus.borrow_mut();
62 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 62 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
63 63
64 let f_res = f(&mut bus); 64 let f_res = f(&mut bus);
65 65
@@ -67,78 +67,78 @@ where
67 let flush_res = bus.flush(); 67 let flush_res = bus.flush();
68 let cs_res = self.cs.set_high(); 68 let cs_res = self.cs.set_high();
69 69
70 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 70 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
71 flush_res.map_err(SpiBusDeviceError::Spi)?; 71 flush_res.map_err(SpiDeviceError::Spi)?;
72 cs_res.map_err(SpiBusDeviceError::Cs)?; 72 cs_res.map_err(SpiDeviceError::Cs)?;
73 73
74 Ok(f_res) 74 Ok(f_res)
75 }) 75 })
76 } 76 }
77} 77}
78 78
79impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiBusDevice<'_, M, BUS, CS> 79impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiDevice<'_, M, BUS, CS>
80where 80where
81 M: RawMutex, 81 M: RawMutex,
82 BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>, 82 BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>,
83 CS: OutputPin<Error = CsErr>, 83 CS: OutputPin<Error = CsErr>,
84{ 84{
85 type Error = SpiBusDeviceError<BusErr, CsErr>; 85 type Error = SpiDeviceError<BusErr, CsErr>;
86 fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { 86 fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
87 self.bus.lock(|bus| { 87 self.bus.lock(|bus| {
88 let mut bus = bus.borrow_mut(); 88 let mut bus = bus.borrow_mut();
89 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 89 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
90 let f_res = bus.transfer(words); 90 let f_res = bus.transfer(words);
91 let cs_res = self.cs.set_high(); 91 let cs_res = self.cs.set_high();
92 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 92 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
93 cs_res.map_err(SpiBusDeviceError::Cs)?; 93 cs_res.map_err(SpiDeviceError::Cs)?;
94 Ok(f_res) 94 Ok(f_res)
95 }) 95 })
96 } 96 }
97} 97}
98 98
99impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiBusDevice<'_, M, BUS, CS> 99impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiDevice<'_, M, BUS, CS>
100where 100where
101 M: RawMutex, 101 M: RawMutex,
102 BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>, 102 BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>,
103 CS: OutputPin<Error = CsErr>, 103 CS: OutputPin<Error = CsErr>,
104{ 104{
105 type Error = SpiBusDeviceError<BusErr, CsErr>; 105 type Error = SpiDeviceError<BusErr, CsErr>;
106 106
107 fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { 107 fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
108 self.bus.lock(|bus| { 108 self.bus.lock(|bus| {
109 let mut bus = bus.borrow_mut(); 109 let mut bus = bus.borrow_mut();
110 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 110 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
111 let f_res = bus.write(words); 111 let f_res = bus.write(words);
112 let cs_res = self.cs.set_high(); 112 let cs_res = self.cs.set_high();
113 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 113 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
114 cs_res.map_err(SpiBusDeviceError::Cs)?; 114 cs_res.map_err(SpiDeviceError::Cs)?;
115 Ok(f_res) 115 Ok(f_res)
116 }) 116 })
117 } 117 }
118} 118}
119 119
120pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> { 120pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
121 bus: &'a Mutex<M, RefCell<BUS>>, 121 bus: &'a Mutex<M, RefCell<BUS>>,
122 cs: CS, 122 cs: CS,
123 config: BUS::Config, 123 config: BUS::Config,
124} 124}
125 125
126impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiBusDeviceWithConfig<'a, M, BUS, CS> { 126impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> {
127 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: BUS::Config) -> Self { 127 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: BUS::Config) -> Self {
128 Self { bus, cs, config } 128 Self { bus, cs, config }
129 } 129 }
130} 130}
131 131
132impl<'a, M, BUS, CS> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS> 132impl<'a, M, BUS, CS> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS>
133where 133where
134 M: RawMutex, 134 M: RawMutex,
135 BUS: spi::ErrorType + SetConfig, 135 BUS: spi::ErrorType + SetConfig,
136 CS: OutputPin, 136 CS: OutputPin,
137{ 137{
138 type Error = SpiBusDeviceError<BUS::Error, CS::Error>; 138 type Error = SpiDeviceError<BUS::Error, CS::Error>;
139} 139}
140 140
141impl<BUS, M, CS> SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS> 141impl<BUS, M, CS> embedded_hal_1::spi::blocking::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
142where 142where
143 M: RawMutex, 143 M: RawMutex,
144 BUS: SpiBusFlush + SetConfig, 144 BUS: SpiBusFlush + SetConfig,
@@ -150,7 +150,7 @@ where
150 self.bus.lock(|bus| { 150 self.bus.lock(|bus| {
151 let mut bus = bus.borrow_mut(); 151 let mut bus = bus.borrow_mut();
152 bus.set_config(&self.config); 152 bus.set_config(&self.config);
153 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 153 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
154 154
155 let f_res = f(&mut bus); 155 let f_res = f(&mut bus);
156 156
@@ -158,9 +158,9 @@ where
158 let flush_res = bus.flush(); 158 let flush_res = bus.flush();
159 let cs_res = self.cs.set_high(); 159 let cs_res = self.cs.set_high();
160 160
161 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 161 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
162 flush_res.map_err(SpiBusDeviceError::Spi)?; 162 flush_res.map_err(SpiDeviceError::Spi)?;
163 cs_res.map_err(SpiBusDeviceError::Cs)?; 163 cs_res.map_err(SpiDeviceError::Cs)?;
164 Ok(f_res) 164 Ok(f_res)
165 }) 165 })
166 } 166 }
diff --git a/embassy-embedded-hal/src/shared_bus/mod.rs b/embassy-embedded-hal/src/shared_bus/mod.rs
index 61200443d..3cd380f72 100644
--- a/embassy-embedded-hal/src/shared_bus/mod.rs
+++ b/embassy-embedded-hal/src/shared_bus/mod.rs
@@ -9,11 +9,11 @@ pub mod asynch;
9pub mod blocking; 9pub mod blocking;
10 10
11#[derive(Copy, Clone, Eq, PartialEq, Debug)] 11#[derive(Copy, Clone, Eq, PartialEq, Debug)]
12pub enum I2cBusDeviceError<BUS> { 12pub enum I2cDeviceError<BUS> {
13 I2c(BUS), 13 I2c(BUS),
14} 14}
15 15
16impl<BUS> i2c::Error for I2cBusDeviceError<BUS> 16impl<BUS> i2c::Error for I2cDeviceError<BUS>
17where 17where
18 BUS: i2c::Error + Debug, 18 BUS: i2c::Error + Debug,
19{ 19{
@@ -25,12 +25,12 @@ where
25} 25}
26 26
27#[derive(Copy, Clone, Eq, PartialEq, Debug)] 27#[derive(Copy, Clone, Eq, PartialEq, Debug)]
28pub enum SpiBusDeviceError<BUS, CS> { 28pub enum SpiDeviceError<BUS, CS> {
29 Spi(BUS), 29 Spi(BUS),
30 Cs(CS), 30 Cs(CS),
31} 31}
32 32
33impl<BUS, CS> spi::Error for SpiBusDeviceError<BUS, CS> 33impl<BUS, CS> spi::Error for SpiDeviceError<BUS, CS>
34where 34where
35 BUS: spi::Error + Debug, 35 BUS: spi::Error + Debug,
36 CS: Debug, 36 CS: Debug,