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-rw-r--r--embassy-embedded-hal/src/shared_bus/blocking/spi.rs64
1 files changed, 32 insertions, 32 deletions
diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
index 704858cdb..ff92e1a7e 100644
--- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
+++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
@@ -3,7 +3,7 @@
3//! # Example (nrf52) 3//! # Example (nrf52)
4//! 4//!
5//! ```rust 5//! ```rust
6//! use embassy_embedded_hal::shared_bus::blocking::spi::SpiBusDevice; 6//! use embassy_embedded_hal::shared_bus::blocking::spi::SpiDevice;
7//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex}; 7//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex};
8//! 8//!
9//! static SPI_BUS: Forever<NoopMutex<RefCell<Spim<SPI3>>>> = Forever::new(); 9//! static SPI_BUS: Forever<NoopMutex<RefCell<Spim<SPI3>>>> = Forever::new();
@@ -14,7 +14,7 @@
14//! 14//!
15//! // Device 1, using embedded-hal compatible driver for ST7735 LCD display 15//! // Device 1, using embedded-hal compatible driver for ST7735 LCD display
16//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard); 16//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
17//! let spi_dev1 = SpiBusDevice::new(spi_bus, cs_pin1); 17//! let spi_dev1 = SpiDevice::new(spi_bus, cs_pin1);
18//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), false, 160, 128); 18//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), false, 160, 128);
19//! ``` 19//! ```
20 20
@@ -24,31 +24,31 @@ use embassy::blocking_mutex::raw::RawMutex;
24use embassy::blocking_mutex::Mutex; 24use embassy::blocking_mutex::Mutex;
25use embedded_hal_1::digital::blocking::OutputPin; 25use embedded_hal_1::digital::blocking::OutputPin;
26use embedded_hal_1::spi; 26use embedded_hal_1::spi;
27use embedded_hal_1::spi::blocking::{SpiBusFlush, SpiDevice}; 27use embedded_hal_1::spi::blocking::SpiBusFlush;
28 28
29use crate::shared_bus::SpiBusDeviceError; 29use crate::shared_bus::SpiDeviceError;
30use crate::SetConfig; 30use crate::SetConfig;
31 31
32pub struct SpiBusDevice<'a, M: RawMutex, BUS, CS> { 32pub struct SpiDevice<'a, M: RawMutex, BUS, CS> {
33 bus: &'a Mutex<M, RefCell<BUS>>, 33 bus: &'a Mutex<M, RefCell<BUS>>,
34 cs: CS, 34 cs: CS,
35} 35}
36 36
37impl<'a, M: RawMutex, BUS, CS> SpiBusDevice<'a, M, BUS, CS> { 37impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS> {
38 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self { 38 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self {
39 Self { bus, cs } 39 Self { bus, cs }
40 } 40 }
41} 41}
42 42
43impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiBusDevice<'a, M, BUS, CS> 43impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS>
44where 44where
45 BUS: spi::ErrorType, 45 BUS: spi::ErrorType,
46 CS: OutputPin, 46 CS: OutputPin,
47{ 47{
48 type Error = SpiBusDeviceError<BUS::Error, CS::Error>; 48 type Error = SpiDeviceError<BUS::Error, CS::Error>;
49} 49}
50 50
51impl<BUS, M, CS> SpiDevice for SpiBusDevice<'_, M, BUS, CS> 51impl<BUS, M, CS> embedded_hal_1::spi::blocking::SpiDevice for SpiDevice<'_, M, BUS, CS>
52where 52where
53 M: RawMutex, 53 M: RawMutex,
54 BUS: SpiBusFlush, 54 BUS: SpiBusFlush,
@@ -59,7 +59,7 @@ where
59 fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> { 59 fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
60 self.bus.lock(|bus| { 60 self.bus.lock(|bus| {
61 let mut bus = bus.borrow_mut(); 61 let mut bus = bus.borrow_mut();
62 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 62 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
63 63
64 let f_res = f(&mut bus); 64 let f_res = f(&mut bus);
65 65
@@ -67,78 +67,78 @@ where
67 let flush_res = bus.flush(); 67 let flush_res = bus.flush();
68 let cs_res = self.cs.set_high(); 68 let cs_res = self.cs.set_high();
69 69
70 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 70 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
71 flush_res.map_err(SpiBusDeviceError::Spi)?; 71 flush_res.map_err(SpiDeviceError::Spi)?;
72 cs_res.map_err(SpiBusDeviceError::Cs)?; 72 cs_res.map_err(SpiDeviceError::Cs)?;
73 73
74 Ok(f_res) 74 Ok(f_res)
75 }) 75 })
76 } 76 }
77} 77}
78 78
79impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiBusDevice<'_, M, BUS, CS> 79impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiDevice<'_, M, BUS, CS>
80where 80where
81 M: RawMutex, 81 M: RawMutex,
82 BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>, 82 BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>,
83 CS: OutputPin<Error = CsErr>, 83 CS: OutputPin<Error = CsErr>,
84{ 84{
85 type Error = SpiBusDeviceError<BusErr, CsErr>; 85 type Error = SpiDeviceError<BusErr, CsErr>;
86 fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { 86 fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
87 self.bus.lock(|bus| { 87 self.bus.lock(|bus| {
88 let mut bus = bus.borrow_mut(); 88 let mut bus = bus.borrow_mut();
89 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 89 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
90 let f_res = bus.transfer(words); 90 let f_res = bus.transfer(words);
91 let cs_res = self.cs.set_high(); 91 let cs_res = self.cs.set_high();
92 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 92 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
93 cs_res.map_err(SpiBusDeviceError::Cs)?; 93 cs_res.map_err(SpiDeviceError::Cs)?;
94 Ok(f_res) 94 Ok(f_res)
95 }) 95 })
96 } 96 }
97} 97}
98 98
99impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiBusDevice<'_, M, BUS, CS> 99impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiDevice<'_, M, BUS, CS>
100where 100where
101 M: RawMutex, 101 M: RawMutex,
102 BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>, 102 BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>,
103 CS: OutputPin<Error = CsErr>, 103 CS: OutputPin<Error = CsErr>,
104{ 104{
105 type Error = SpiBusDeviceError<BusErr, CsErr>; 105 type Error = SpiDeviceError<BusErr, CsErr>;
106 106
107 fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { 107 fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
108 self.bus.lock(|bus| { 108 self.bus.lock(|bus| {
109 let mut bus = bus.borrow_mut(); 109 let mut bus = bus.borrow_mut();
110 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 110 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
111 let f_res = bus.write(words); 111 let f_res = bus.write(words);
112 let cs_res = self.cs.set_high(); 112 let cs_res = self.cs.set_high();
113 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 113 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
114 cs_res.map_err(SpiBusDeviceError::Cs)?; 114 cs_res.map_err(SpiDeviceError::Cs)?;
115 Ok(f_res) 115 Ok(f_res)
116 }) 116 })
117 } 117 }
118} 118}
119 119
120pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> { 120pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
121 bus: &'a Mutex<M, RefCell<BUS>>, 121 bus: &'a Mutex<M, RefCell<BUS>>,
122 cs: CS, 122 cs: CS,
123 config: BUS::Config, 123 config: BUS::Config,
124} 124}
125 125
126impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiBusDeviceWithConfig<'a, M, BUS, CS> { 126impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> {
127 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: BUS::Config) -> Self { 127 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: BUS::Config) -> Self {
128 Self { bus, cs, config } 128 Self { bus, cs, config }
129 } 129 }
130} 130}
131 131
132impl<'a, M, BUS, CS> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS> 132impl<'a, M, BUS, CS> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS>
133where 133where
134 M: RawMutex, 134 M: RawMutex,
135 BUS: spi::ErrorType + SetConfig, 135 BUS: spi::ErrorType + SetConfig,
136 CS: OutputPin, 136 CS: OutputPin,
137{ 137{
138 type Error = SpiBusDeviceError<BUS::Error, CS::Error>; 138 type Error = SpiDeviceError<BUS::Error, CS::Error>;
139} 139}
140 140
141impl<BUS, M, CS> SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS> 141impl<BUS, M, CS> embedded_hal_1::spi::blocking::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
142where 142where
143 M: RawMutex, 143 M: RawMutex,
144 BUS: SpiBusFlush + SetConfig, 144 BUS: SpiBusFlush + SetConfig,
@@ -150,7 +150,7 @@ where
150 self.bus.lock(|bus| { 150 self.bus.lock(|bus| {
151 let mut bus = bus.borrow_mut(); 151 let mut bus = bus.borrow_mut();
152 bus.set_config(&self.config); 152 bus.set_config(&self.config);
153 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 153 self.cs.set_low().map_err(SpiDeviceError::Cs)?;
154 154
155 let f_res = f(&mut bus); 155 let f_res = f(&mut bus);
156 156
@@ -158,9 +158,9 @@ where
158 let flush_res = bus.flush(); 158 let flush_res = bus.flush();
159 let cs_res = self.cs.set_high(); 159 let cs_res = self.cs.set_high();
160 160
161 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 161 let f_res = f_res.map_err(SpiDeviceError::Spi)?;
162 flush_res.map_err(SpiBusDeviceError::Spi)?; 162 flush_res.map_err(SpiDeviceError::Spi)?;
163 cs_res.map_err(SpiBusDeviceError::Cs)?; 163 cs_res.map_err(SpiDeviceError::Cs)?;
164 Ok(f_res) 164 Ok(f_res)
165 }) 165 })
166 } 166 }