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-rw-r--r--embassy-mspm0/src/i2c.rs21
1 files changed, 13 insertions, 8 deletions
diff --git a/embassy-mspm0/src/i2c.rs b/embassy-mspm0/src/i2c.rs
index 1906e37ba..3067f4833 100644
--- a/embassy-mspm0/src/i2c.rs
+++ b/embassy-mspm0/src/i2c.rs
@@ -10,13 +10,13 @@ use embassy_hal_internal::PeripheralType;
10use embassy_sync::waitqueue::AtomicWaker; 10use embassy_sync::waitqueue::AtomicWaker;
11use mspm0_metapac::i2c; 11use mspm0_metapac::i2c;
12 12
13use crate::Peri;
13use crate::gpio::{AnyPin, PfType, Pull, SealedPin}; 14use crate::gpio::{AnyPin, PfType, Pull, SealedPin};
14use crate::interrupt::typelevel::Binding; 15use crate::interrupt::typelevel::Binding;
15use crate::interrupt::{Interrupt, InterruptExt}; 16use crate::interrupt::{Interrupt, InterruptExt};
16use crate::mode::{Async, Blocking, Mode}; 17use crate::mode::{Async, Blocking, Mode};
17use crate::pac::i2c::{vals, I2c as Regs}; 18use crate::pac::i2c::{I2c as Regs, vals};
18use crate::pac::{self}; 19use crate::pac::{self};
19use crate::Peri;
20 20
21/// The clock source for the I2C. 21/// The clock source for the I2C.
22#[derive(Clone, Copy, PartialEq, Eq, Debug)] 22#[derive(Clone, Copy, PartialEq, Eq, Debug)]
@@ -56,7 +56,7 @@ pub enum ClockDiv {
56} 56}
57 57
58impl ClockDiv { 58impl ClockDiv {
59 fn into(self) -> vals::Ratio { 59 pub(crate) fn into(self) -> vals::Ratio {
60 match self { 60 match self {
61 Self::DivBy1 => vals::Ratio::DIV_BY_1, 61 Self::DivBy1 => vals::Ratio::DIV_BY_1,
62 Self::DivBy2 => vals::Ratio::DIV_BY_2, 62 Self::DivBy2 => vals::Ratio::DIV_BY_2,
@@ -133,6 +133,11 @@ pub enum ConfigError {
133 /// 133 ///
134 /// The clock soure is not enabled is SYSCTL. 134 /// The clock soure is not enabled is SYSCTL.
135 ClockSourceNotEnabled, 135 ClockSourceNotEnabled,
136
137 /// Invalid target address.
138 ///
139 /// The target address is not 7-bit.
140 InvalidTargetAddress,
136} 141}
137 142
138#[non_exhaustive] 143#[non_exhaustive]
@@ -140,7 +145,7 @@ pub enum ConfigError {
140/// Config 145/// Config
141pub struct Config { 146pub struct Config {
142 /// I2C clock source. 147 /// I2C clock source.
143 clock_source: ClockSel, 148 pub(crate) clock_source: ClockSel,
144 149
145 /// I2C clock divider. 150 /// I2C clock divider.
146 pub clock_div: ClockDiv, 151 pub clock_div: ClockDiv,
@@ -196,7 +201,7 @@ impl Config {
196 } 201 }
197 202
198 #[cfg(any(mspm0c110x, mspm0c1105_c1106))] 203 #[cfg(any(mspm0c110x, mspm0c1105_c1106))]
199 fn calculate_clock_source(&self) -> u32 { 204 pub(crate) fn calculate_clock_source(&self) -> u32 {
200 // Assume that BusClk has default value. 205 // Assume that BusClk has default value.
201 // TODO: calculate BusClk more precisely. 206 // TODO: calculate BusClk more precisely.
202 match self.clock_source { 207 match self.clock_source {
@@ -206,10 +211,10 @@ impl Config {
206 } 211 }
207 212
208 #[cfg(any( 213 #[cfg(any(
209 mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x, mspm0l110x, mspm0l122x, mspm0l130x, 214 mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x, mspm0h321x, mspm0l110x, mspm0l122x,
210 mspm0l134x, mspm0l222x 215 mspm0l130x, mspm0l134x, mspm0l222x
211 ))] 216 ))]
212 fn calculate_clock_source(&self) -> u32 { 217 pub(crate) fn calculate_clock_source(&self) -> u32 {
213 // Assume that BusClk has default value. 218 // Assume that BusClk has default value.
214 // TODO: calculate BusClk more precisely. 219 // TODO: calculate BusClk more precisely.
215 match self.clock_source { 220 match self.clock_source {