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-rw-r--r--embassy-stm32/src/hsem/mod.rs3
1 files changed, 2 insertions, 1 deletions
diff --git a/embassy-stm32/src/hsem/mod.rs b/embassy-stm32/src/hsem/mod.rs
index e62de0454..b5fa3c897 100644
--- a/embassy-stm32/src/hsem/mod.rs
+++ b/embassy-stm32/src/hsem/mod.rs
@@ -148,6 +148,7 @@ impl<'a, T: Instance> HardwareSemaphoreChannel<'a, T> {
148 /// The 2-step lock procedure consists in a write to lock the semaphore, followed by a read to 148 /// The 2-step lock procedure consists in a write to lock the semaphore, followed by a read to
149 /// check if the lock has been successful, carried out from the HSEM_Rx register. 149 /// check if the lock has been successful, carried out from the HSEM_Rx register.
150 pub async fn lock(&mut self, process_id: u8) -> HardwareSemaphoreMutex<'a, T> { 150 pub async fn lock(&mut self, process_id: u8) -> HardwareSemaphoreMutex<'a, T> {
151 let _scoped_block_stop = T::RCC_INFO.block_stop();
151 let core_id = CoreId::current(); 152 let core_id = CoreId::current();
152 153
153 poll_fn(|cx| { 154 poll_fn(|cx| {
@@ -241,7 +242,7 @@ impl<T: Instance> HardwareSemaphore<T> {
241 _peripheral: Peri<'d, T>, 242 _peripheral: Peri<'d, T>,
242 _irq: impl interrupt::typelevel::Binding<T::Interrupt, HardwareSemaphoreInterruptHandler<T>> + 'd, 243 _irq: impl interrupt::typelevel::Binding<T::Interrupt, HardwareSemaphoreInterruptHandler<T>> + 'd,
243 ) -> Self { 244 ) -> Self {
244 rcc::enable_and_reset::<T>(); 245 rcc::enable_and_reset_without_stop::<T>();
245 246
246 HardwareSemaphore { _type: PhantomData } 247 HardwareSemaphore { _type: PhantomData }
247 } 248 }