1 files changed, 9 insertions, 20 deletions

diff --git a/embassy-stm32/src/timer/ringbuffered.rs b/embassy-stm32/src/timer/ringbuffered.rs
index e8f97bf59..fbb6b19ea 100644
--- a/embassy-stm32/src/timer/ringbuffered.rs
+++ b/embassy-stm32/src/timer/ringbuffered.rs
@@ -7,6 +7,7 @@ use super::low_level::Timer;
 use super::{Channel, GeneralInstance4Channel};
 use crate::dma::WritableRingBuffer;
 use crate::dma::ringbuffer::Error;
+use crate::dma::word::Word;
 
 /// A PWM channel that uses a DMA ring buffer for continuous waveform generation.
 ///
@@ -23,17 +24,17 @@ use crate::dma::ringbuffer::Error;
 /// channel.start(); // Start DMA transfer
 /// channel.write(&[100, 200, 300]).ok(); // Update duty cycles
 /// ```
-pub struct RingBufferedPwmChannel<'d, T: GeneralInstance4Channel> {
+pub struct RingBufferedPwmChannel<'d, T: GeneralInstance4Channel, W: Word + Into<T::Word>> {
     timer: ManuallyDrop<Timer<'d, T>>,
-    ring_buf: WritableRingBuffer<'d, u16>,
+    ring_buf: WritableRingBuffer<'d, W>,
     channel: Channel,
 }
 
-impl<'d, T: GeneralInstance4Channel> RingBufferedPwmChannel<'d, T> {
+impl<'d, T: GeneralInstance4Channel, W: Word + Into<T::Word>> RingBufferedPwmChannel<'d, T, W> {
     pub(crate) fn new(
         timer: ManuallyDrop<Timer<'d, T>>,
         channel: Channel,
-        ring_buf: WritableRingBuffer<'d, u16>,
+        ring_buf: WritableRingBuffer<'d, W>,
     ) -> Self {
         Self {
             timer,
@@ -55,18 +56,18 @@ impl<'d, T: GeneralInstance4Channel> RingBufferedPwmChannel<'d, T> {
     }
 
     /// Write elements directly to the raw buffer. This can be used to fill the buffer before starting the DMA transfer.
-    pub fn write_immediate(&mut self, buf: &[u16]) -> Result<(usize, usize), Error> {
+    pub fn write_immediate(&mut self, buf: &[W]) -> Result<(usize, usize), Error> {
         self.ring_buf.write_immediate(buf)
     }
 
     /// Write elements from the ring buffer
     /// Return a tuple of the length written and the length remaining in the buffer
-    pub fn write(&mut self, buf: &[u16]) -> Result<(usize, usize), Error> {
+    pub fn write(&mut self, buf: &[W]) -> Result<(usize, usize), Error> {
         self.ring_buf.write(buf)
     }
 
     /// Write an exact number of elements to the ringbuffer.
-    pub async fn write_exact(&mut self, buffer: &[u16]) -> Result<usize, Error> {
+    pub async fn write_exact(&mut self, buffer: &[W]) -> Result<usize, Error> {
         self.ring_buf.write_exact(buffer).await
     }
 
@@ -140,7 +141,7 @@ impl<'d, T: GeneralInstance4Channel> RingBufferedPwmChannel<'d, T> {
     ///
     /// This value depends on the configured frequency and the timer's clock rate from RCC.
     pub fn max_duty_cycle(&self) -> u16 {
-        let max = self.timer.get_max_compare_value();
+        let max: u32 = self.timer.get_max_compare_value().into();
         assert!(max < u16::MAX as u32);
         max as u16 + 1
     }
@@ -155,15 +156,3 @@ impl<'d, T: GeneralInstance4Channel> RingBufferedPwmChannel<'d, T> {
         self.timer.set_output_compare_mode(self.channel, mode);
     }
 }
-
-/// A group of four [`SimplePwmChannel`]s, obtained from [`SimplePwm::split`].
-pub struct RingBufferedPwmChannels<'d, T: GeneralInstance4Channel> {
-    /// Channel 1
-    pub ch1: RingBufferedPwmChannel<'d, T>,
-    /// Channel 2
-    pub ch2: RingBufferedPwmChannel<'d, T>,
-    /// Channel 3
-    pub ch3: RingBufferedPwmChannel<'d, T>,
-    /// Channel 4
-    pub ch4: RingBufferedPwmChannel<'d, T>,
-}