diff options
Diffstat (limited to 'examples/src/bin/adc_interrupt.rs')
| -rw-r--r-- | examples/src/bin/adc_interrupt.rs | 84 |
1 files changed, 0 insertions, 84 deletions
diff --git a/examples/src/bin/adc_interrupt.rs b/examples/src/bin/adc_interrupt.rs deleted file mode 100644 index 83d8046b3..000000000 --- a/examples/src/bin/adc_interrupt.rs +++ /dev/null | |||
| @@ -1,84 +0,0 @@ | |||
| 1 | #![no_std] | ||
| 2 | #![no_main] | ||
| 3 | |||
| 4 | use embassy_executor::Spawner; | ||
| 5 | use embassy_mcxa_examples::init_adc_pins; | ||
| 6 | use hal::adc::{LpadcConfig, TriggerPriorityPolicy}; | ||
| 7 | use hal::clocks::periph_helpers::{AdcClockSel, Div4}; | ||
| 8 | use hal::clocks::PoweredClock; | ||
| 9 | use hal::pac::adc1::cfg::{Pwrsel, Refsel}; | ||
| 10 | use hal::pac::adc1::cmdl1::{Adch, Mode}; | ||
| 11 | use hal::pac::adc1::ctrl::CalAvgs; | ||
| 12 | use hal::pac::adc1::tctrl::Tcmd; | ||
| 13 | use hal::{bind_interrupts, InterruptExt}; | ||
| 14 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; | ||
| 15 | |||
| 16 | bind_interrupts!(struct Irqs { | ||
| 17 | ADC1 => hal::adc::AdcHandler; | ||
| 18 | }); | ||
| 19 | |||
| 20 | #[used] | ||
| 21 | #[no_mangle] | ||
| 22 | static KEEP_ADC: unsafe extern "C" fn() = ADC1; | ||
| 23 | |||
| 24 | #[embassy_executor::main] | ||
| 25 | async fn main(_spawner: Spawner) { | ||
| 26 | let p = hal::init(hal::config::Config::default()); | ||
| 27 | |||
| 28 | defmt::info!("ADC interrupt Example"); | ||
| 29 | |||
| 30 | unsafe { | ||
| 31 | init_adc_pins(); | ||
| 32 | } | ||
| 33 | |||
| 34 | let adc_config = LpadcConfig { | ||
| 35 | enable_in_doze_mode: true, | ||
| 36 | conversion_average_mode: CalAvgs::Average128, | ||
| 37 | enable_analog_preliminary: true, | ||
| 38 | power_up_delay: 0x80, | ||
| 39 | reference_voltage_source: Refsel::Option3, | ||
| 40 | power_level_mode: Pwrsel::Lowest, | ||
| 41 | trigger_priority_policy: TriggerPriorityPolicy::ConvPreemptImmediatelyNotAutoResumed, | ||
| 42 | enable_conv_pause: false, | ||
| 43 | conv_pause_delay: 0, | ||
| 44 | fifo_watermark: 0, | ||
| 45 | power: PoweredClock::NormalEnabledDeepSleepDisabled, | ||
| 46 | source: AdcClockSel::FroLfDiv, | ||
| 47 | div: Div4::no_div(), | ||
| 48 | }; | ||
| 49 | let adc = hal::adc::Adc::<hal::adc::Adc1>::new(p.ADC1, adc_config); | ||
| 50 | |||
| 51 | adc.do_offset_calibration(); | ||
| 52 | adc.do_auto_calibration(); | ||
| 53 | |||
| 54 | let mut conv_command_config = adc.get_default_conv_command_config(); | ||
| 55 | conv_command_config.channel_number = Adch::SelectCorrespondingChannel8; | ||
| 56 | conv_command_config.conversion_resolution_mode = Mode::Data16Bits; | ||
| 57 | adc.set_conv_command_config(1, &conv_command_config); | ||
| 58 | |||
| 59 | let mut conv_trigger_config = adc.get_default_conv_trigger_config(); | ||
| 60 | conv_trigger_config.target_command_id = Tcmd::ExecuteCmd1; | ||
| 61 | conv_trigger_config.enable_hardware_trigger = false; | ||
| 62 | adc.set_conv_trigger_config(0, &conv_trigger_config); | ||
| 63 | |||
| 64 | defmt::info!("ADC configuration done..."); | ||
| 65 | |||
| 66 | adc.enable_interrupt(0x1); | ||
| 67 | |||
| 68 | unsafe { | ||
| 69 | hal::interrupt::ADC1.enable(); | ||
| 70 | } | ||
| 71 | |||
| 72 | unsafe { | ||
| 73 | cortex_m::interrupt::enable(); | ||
| 74 | } | ||
| 75 | |||
| 76 | loop { | ||
| 77 | adc.do_software_trigger(1); | ||
| 78 | while !adc.is_interrupt_triggered() { | ||
| 79 | // Wait until the interrupt is triggered | ||
| 80 | } | ||
| 81 | defmt::info!("*** ADC interrupt TRIGGERED! ***"); | ||
| 82 | //TBD need to print the value | ||
| 83 | } | ||
| 84 | } | ||
