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Diffstat (limited to 'examples/stm32h7/src/bin/camera.rs')
-rw-r--r--examples/stm32h7/src/bin/camera.rs6
1 files changed, 3 insertions, 3 deletions
diff --git a/examples/stm32h7/src/bin/camera.rs b/examples/stm32h7/src/bin/camera.rs
index 8195430b2..23ece1c38 100644
--- a/examples/stm32h7/src/bin/camera.rs
+++ b/examples/stm32h7/src/bin/camera.rs
@@ -28,17 +28,17 @@ async fn main(_spawner: Spawner) {
28 let mut config = Config::default(); 28 let mut config = Config::default();
29 { 29 {
30 use embassy_stm32::rcc::*; 30 use embassy_stm32::rcc::*;
31 config.rcc.hsi = Some(Hsi::Mhz64); 31 config.rcc.hsi = Some(HSIPrescaler::DIV1);
32 config.rcc.csi = true; 32 config.rcc.csi = true;
33 config.rcc.pll_src = PllSource::Hsi;
34 config.rcc.pll1 = Some(Pll { 33 config.rcc.pll1 = Some(Pll {
34 source: PllSource::HSI,
35 prediv: PllPreDiv::DIV4, 35 prediv: PllPreDiv::DIV4,
36 mul: PllMul::MUL50, 36 mul: PllMul::MUL50,
37 divp: Some(PllDiv::DIV2), 37 divp: Some(PllDiv::DIV2),
38 divq: Some(PllDiv::DIV8), // 100mhz 38 divq: Some(PllDiv::DIV8), // 100mhz
39 divr: None, 39 divr: None,
40 }); 40 });
41 config.rcc.sys = Sysclk::Pll1P; // 400 Mhz 41 config.rcc.sys = Sysclk::PLL1_P; // 400 Mhz
42 config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz 42 config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz
43 config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz 43 config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz
44 config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz 44 config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz