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Diffstat (limited to 'examples/stm32h7/src/bin/usb_serial.rs')
-rw-r--r--examples/stm32h7/src/bin/usb_serial.rs6
1 files changed, 3 insertions, 3 deletions
diff --git a/examples/stm32h7/src/bin/usb_serial.rs b/examples/stm32h7/src/bin/usb_serial.rs
index c1e5144be..19d77183b 100644
--- a/examples/stm32h7/src/bin/usb_serial.rs
+++ b/examples/stm32h7/src/bin/usb_serial.rs
@@ -23,18 +23,18 @@ async fn main(_spawner: Spawner) {
23 let mut config = Config::default(); 23 let mut config = Config::default();
24 { 24 {
25 use embassy_stm32::rcc::*; 25 use embassy_stm32::rcc::*;
26 config.rcc.hsi = Some(Hsi::Mhz64); 26 config.rcc.hsi = Some(HSIPrescaler::DIV1);
27 config.rcc.csi = true; 27 config.rcc.csi = true;
28 config.rcc.hsi48 = true; // needed for USB 28 config.rcc.hsi48 = true; // needed for USB
29 config.rcc.pll_src = PllSource::Hsi;
30 config.rcc.pll1 = Some(Pll { 29 config.rcc.pll1 = Some(Pll {
30 source: PllSource::HSI,
31 prediv: PllPreDiv::DIV4, 31 prediv: PllPreDiv::DIV4,
32 mul: PllMul::MUL50, 32 mul: PllMul::MUL50,
33 divp: Some(PllDiv::DIV2), 33 divp: Some(PllDiv::DIV2),
34 divq: None, 34 divq: None,
35 divr: None, 35 divr: None,
36 }); 36 });
37 config.rcc.sys = Sysclk::Pll1P; // 400 Mhz 37 config.rcc.sys = Sysclk::PLL1_P; // 400 Mhz
38 config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz 38 config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz
39 config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz 39 config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz
40 config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz 40 config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz