aboutsummaryrefslogtreecommitdiff
path: root/examples
diff options
context:
space:
mode:
Diffstat (limited to 'examples')
-rw-r--r--examples/stm32wba/src/bin/usb_hs_serial.rs10
1 files changed, 5 insertions, 5 deletions
diff --git a/examples/stm32wba/src/bin/usb_hs_serial.rs b/examples/stm32wba/src/bin/usb_hs_serial.rs
index d77a679fe..e30f33625 100644
--- a/examples/stm32wba/src/bin/usb_hs_serial.rs
+++ b/examples/stm32wba/src/bin/usb_hs_serial.rs
@@ -36,11 +36,11 @@ async fn main(_spawner: Spawner) {
36 // Fine-tune PLL1 dividers/multipliers 36 // Fine-tune PLL1 dividers/multipliers
37 config.rcc.pll1 = Some(embassy_stm32::rcc::Pll { 37 config.rcc.pll1 = Some(embassy_stm32::rcc::Pll {
38 source: PllSource::HSE, 38 source: PllSource::HSE,
39 pllm: 2, // PLLM = 2 → HSE / 2 = 16 MHz input 39 pllm: 2.into(), // PLLM = 2 → HSE / 2 = 16 MHz input
40 mul: 12, // PLLN = 12 → 16 MHz * 12 = 192 MHz VCO 40 mul: 12.into(), // PLLN = 12 → 16 MHz * 12 = 192 MHz VCO
41 divp: Some(2), // PLLP = 2 → 96 MHz 41 divp: Some(2.into()), // PLLP = 2 → 96 MHz
42 divq: Some(2), // PLLQ = 2 → 96 MHz 42 divq: Some(2.into()), // PLLQ = 2 → 96 MHz
43 divr: Some(2), // PLLR = 2 → 96 MHz 43 divr: Some(2.into()), // PLLR = 2 → 96 MHz
44 frac: Some(4096), // Fractional part (enabled) 44 frac: Some(4096), // Fractional part (enabled)
45 }); 45 });
46 46