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* nrf/timer: remove awaitable.Dario Nieuwenhuis2023-03-062-150/+10
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* nrf/uart: switch to new interrupt binding.Dario Nieuwenhuis2023-03-069-176/+206
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* nrf: add new interrupt binding traits and macro.Dario Nieuwenhuis2023-03-062-4/+59
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* cortex-m: rename Handler to DynHandler.Dario Nieuwenhuis2023-03-063-6/+6
| | | | I want to use the name Handler for the new interrupt binding macro.
* Merge #1260bors[bot]2023-03-051-4/+13
|\ | | | | | | | | | | | | | | | | | | 1260: time/ticker: make sure the future for .next() is Unpin. r=Dirbaio a=Dirbaio It was Unpin before #1248 bors r+ Co-authored-by: Dario Nieuwenhuis <[email protected]>
| * time/ticker: make sure the future for .next() is Unpin.Dario Nieuwenhuis2023-03-051-4/+13
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* readme: add embassy-rpDario Nieuwenhuis2023-03-051-0/+1
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* Merge pull request #1232 from embassy-rs/nrf-qspi-fixesDario Nieuwenhuis2023-03-055-101/+168
|\ | | | | nrf/qspi: nrf53 support, u32 addrs, remove const generic, add raw read/write.
| * nrf/qspi: add _raw variants of methods that don't do bounds checks.Dario Nieuwenhuis2023-03-053-20/+76
| | | | | | | | | | Useful for the nRF7002, which presents as a "fake" QSPI flash, and the "capacity" concept doesn't really apply to it.
| * nrf/qspi: remove FLASH_SIZE const generic param.Dario Nieuwenhuis2023-03-053-18/+22
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| * nrf/qspi: always use u32 for addresses.Dario Nieuwenhuis2023-03-052-36/+36
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| * nrf/qspi: add nrf53 support.Dario Nieuwenhuis2023-03-053-20/+26
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| * nrf/qspi: remove cfg_if hackDario Nieuwenhuis2023-03-051-30/+31
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* | Merge pull request #1208 from embassy-rs/nrf-uarte-lockfreeDario Nieuwenhuis2023-03-0516-365/+1096
|\ \ | |/ |/| nrf/buffered_uarte: make it work without rts/cts, and lock-free.
| * nrf/buffered_uarte: add HIL tests.Dario Nieuwenhuis2023-03-049-1/+466
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| * nrf/buffered_uarte: make available on stable.Dario Nieuwenhuis2023-03-043-45/+117
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| * nrf/buffered_uarte: remove PeripheralMutex, make it work without rts/cts.Dario Nieuwenhuis2023-03-043-308/+381
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | > dirbaio: so I was checking how zephyr does UARTE RX on nRF > dirbaio: because currently we have the ugly "restart DMA on line idle to flush it" hack > dirbaio: because according to the docs "For each byte received over the RXD line, an RXDRDY event will be generated. This event is likely to occur before the corresponding data has been transferred to Data RAM." > dirbaio: so as I understood it, the only way to guarantee the data is actually transferred to RAM is to stop+restart DMA > dirbaio: well, guess what? > dirbaio: they just count RXDRDY's, and process that amount of data without restarting DMA > dirbaio: with a timer configured as counter https://github.com/zephyrproject-rtos/zephyr/blob/main/drivers/serial/uart_nrfx_uarte.c#L650-L692 > dirbaio: 🤔🤷⁉️ > dirbaio: someone saying you can do the "hook up rxdrdy to a counter" trick, someone else saying it's wrong 🤪 https://devzone.nordicsemi.com/f/nordic-q-a/28420/uarte-in-circular-mode So we're going to do just that! - BufferedUarte is lock-free now. No PeripheralMutex. - The "restart DMA on line idle to flush it" hack is GONE. This means - It'll work correctly without RTS/CTS now. - It'll have better throughput when using RTS/CTS.
| * nrf/timer: add support for counter mode.Dario Nieuwenhuis2023-03-041-5/+38
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| * nrf: add PPI channel group driver.Dario Nieuwenhuis2023-03-043-10/+98
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* | Merge pull request #1259 from dalegaard/masterDario Nieuwenhuis2023-03-041-0/+100
|\ \ | |/ |/| embassy_usb: Add split() for cdc_acm
| * embassy_usb: Add split() for cdc_acmLasse Dalegaard2023-03-041-0/+100
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* Merge pull request #1258 from CBJamo/rp-gpio-loglevelDario Nieuwenhuis2023-03-021-9/+9
|\ | | | | Swap debug! for trace! in rp gpio
| * Swap debug! for trace! in rp gpioCaleb Jamison2023-03-021-9/+9
|/ | | | | | When using gpio pin changes for things like peripheral interrupts these debug! calls flood defmt, making it difficult to find what you're actually looking for.
* Merge pull request #1257 from MabezDev/docs/add-esp-halDario Nieuwenhuis2023-03-021-0/+3
|\ | | | | docs: add esp-hal
| * Add embassy-esp READMEScott Mabin2023-03-021-0/+3
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* Merge pull request #1256 from pattop/hal_common_atomic_ring_buffer_push_slicesDario Nieuwenhuis2023-03-021-0/+147
|\ | | | | hal-common/atomic_ring_buffer: add push_bufs() push_slices()
| * hal-common/atomic_ring_buffer: add push_bufs() push_slices()Patrick Oppenlander2023-03-021-0/+147
|/ | | | | This allows a writer to access all of the free space in the buffer, even when it's wrapping around.
* Merge #1255bors[bot]2023-03-021-29/+69
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | 1255: common: allow atomic ringbuf to fill up to N instead of just N-1. r=Dirbaio a=Dirbaio Extracted out of #1208. Since I don't think that'll end up using the ringbuf in the end, I've separated it. This allows the ringbuf to be filled up to `N` instead of just `N-1`, using some fun tricks on the indices. The advantage is better performance: Before, the first write would fill N-1 bytes, The second would write just the 1 byte left before wrapping, then N-2. Then 2, then N-3, and so on. This would result in more smaller chunks, so worse perf. This problem is gone now. bors r+ Co-authored-by: Dario Nieuwenhuis <[email protected]>
| * common: allow atomic ringbuf to fill up to N instead of just N-1.Dario Nieuwenhuis2023-03-021-29/+69
|/ | | | | | This allows the ringbuf to be filled up to `N` instead of just `N-1`, using some fun tricks on the indices. The advantage is better performance: Before, the first write would fill N-1 bytes, The second would write just the 1 byte left before wrapping, then N-2. Then 2, then N-3, and so on. This would result in more smaller chunks, so worse perf. This problem is gone now.
* Merge pull request #1244 from embassy-rs/interruptexecutorDario Nieuwenhuis2023-03-016-85/+152
|\ | | | | cortex-m/executor: don't use the owned interrupts system.
| * cortex-m/executor: don't use the owned interrupts system.Dario Nieuwenhuis2023-02-286-85/+152
| | | | | | | | Preparation for #1224.
* | Merge pull request #1254 from davidedellagiustina/fixDario Nieuwenhuis2023-03-011-1/+1
|\ \ | | | | | | FIx `PacketQueue::init()`
| * | Apply fixDavide Della Giustina2023-03-011-1/+1
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* | Merge pull request #1252 from pattop/stm32_spi_fifo_fixDario Nieuwenhuis2023-03-011-2/+4
|\ \ | | | | | | stm32/spi: fix occasional data corruption
| * | stm32/spi: fix occasional data corruptionPatrick Oppenlander2023-03-011-2/+4
| | | | | | | | | | | | Need to clear the rx fifo before enabling rx dma.
* | | Merge pull request #1251 from embassy-rs/fix-examplesDario Nieuwenhuis2023-03-016-56/+11
|\ \ \ | |_|/ |/| | Example fixes.
| * | Example fixes.Dario Nieuwenhuis2023-03-016-56/+11
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* | Merge #1245bors[bot]2023-02-281-1/+10
|\ \ | | | | | | | | | | | | | | | | | | | | | 1245: fix: rp - disable Pull-down/up resistors for ADC read r=Dirbaio a=elpiel Co-authored-by: Lachezar Lechev <[email protected]>
| * | fix: rp - disable Pull-down/up resistors for ADC readLachezar Lechev2023-02-281-1/+10
| | | | | | | | | | | | Signed-off-by: Lachezar Lechev <[email protected]>
* | | Merge #1247bors[bot]2023-02-281-0/+8
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1247: `PacketQueue::init()` r=davidedellagiustina a=davidedellagiustina `PacketQueue` is pretty big, so I added a method to initialize it without requiring an allocation on the stack (which could in fact overflow). Before this PR, the only solution would be to declare a `PacketQueue` instance as a `static mut`, while now one could for example have a `Box<MaybeUninit<PacketQueue<...>>>` and then use `init()` on it. Ideally, the same work would need to be done for all those structures that own big arrays which could overflow the stack. Co-authored-by: Davide Della Giustina <[email protected]>
| * | | PacketQueue::init() does not need to be unsafeDavide Della Giustina2023-02-281-2/+4
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| * | | Implemented suggestions from @DirbaioDavide Della Giustina2023-02-282-40/+11
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| * | | PacketQueue::new() uses ::init() when in nightlyDavide Della Giustina2023-02-281-7/+18
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| * | | Added PacketQueue::init()Davide Della Giustina2023-02-282-1/+25
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* | | Merge #1248bors[bot]2023-02-281-1/+6
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | 1248: embassy-time: add async tick() method to Ticker r=Dirbaio a=kbleeke Small QOL change so you don't have to add a direct dependency on futures-util to use the Ticker Co-authored-by: kbleeke <[email protected]>
| * | embassy-time: add async tick() method to Tickerkbleeke2023-02-281-1/+6
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* | Merge #1243bors[bot]2023-02-271-18/+31
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1243: RP-PICO UART adding set_baudrate r=Dirbaio a=andres-hurtado-lopez The following PR attepts to bring fuctionality to allow change od UART baudrate changes during runtime. Changes where created under `@Dirbaio` supervision and discussed on issue: [https://github.com/embassy-rs/embassy/issues/1241#issuecomment-1445500175]( https://github.com/embassy-rs/embassy/issues/1241#issuecomment-1445500175) Co-authored-by: Andres Hurtado Lopez <[email protected]>
| * | RP-PICO UART adding set_baudrate: missing to run rust-fmtAndres Hurtado Lopez2023-02-261-14/+10
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| * | RP-PICO UART adding set_baudrate: Changing static call from specific type to ↵Andres Hurtado Lopez2023-02-261-2/+2
| | | | | | | | | | | | a Self (requires adding lifetime specifier)
| * | RP-PICO UART adding set_baudrate: refactoring of methodsAndres Hurtado Lopez2023-02-261-28/+23
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