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path: root/embassy-stm32/src/rcc/f3.rs
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* stm32/rcc: unify f0, f1, f3.Dario Nieuwenhuis2024-02-141-345/+0
* stm32/rcc: some f3 fixes.Dario Nieuwenhuis2024-02-131-2/+3
* stm32/rcc: port F3 RCC to new APIDario Nieuwenhuis2024-02-121-363/+246
* stm32: autogenerate clocks struct, enable mux for all chips.Dario Nieuwenhuis2024-02-021-10/+12
* STM32: Remove vestigal build.rs cfgs, add new flashsize_X and package_X cfgs,...Adam Greig2023-11-251-4/+1
* stm32: update metapacxoviat2023-10-171-2/+2
* rcc: ahb/apb -> hclk/pclkxoviat2023-10-151-5/+5
* stm32/rcc: add LSE/LSI to all chips, add RTC to more chips.Dario Nieuwenhuis2023-10-111-3/+4
* stm32/rcc: use more PLL etc enums from PAC.Dario Nieuwenhuis2023-10-111-113/+74
* stm32: generate adc_commonxoviat2023-09-151-4/+10
* stm32/f3: add high res for hrtim and misc.xoviat2023-09-101-70/+129
* stm32: add initial adc f3 implxoviat2023-09-051-1/+92
* stm32/rcc: rename common to busxoviat2023-08-271-3/+3
* rustfmtxoviat2023-06-301-0/+1
* Refactor IWDG to use LSI frequency from RCCchemicstry2022-07-101-6/+10
* stm32/rcc: Modify only relevant CFGR bits and keep the settings previously done.Ralf2022-05-121-6/+11
* stm32/rcc: Set flash prefetch buffer and half cycle access according to AHB c...Ralf2022-05-121-1/+8
* stm32/rcc: fix f3 build failure.Dario Nieuwenhuis2022-02-231-1/+1
* Update stm32-dataDario Nieuwenhuis2022-02-141-7/+3
* stm32f3: fix nonexistent cfg testsGreg V2022-02-021-2/+2
* stm32/rcc: remove Rcc struct, RccExt trait.Dario Nieuwenhuis2022-01-051-248/+205
* stm32/rcc: change family-specific code from dirs to single files.Dario Nieuwenhuis2022-01-041-0/+374
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