| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | stm32/rcc: unify f0, f1, f3. | Dario Nieuwenhuis | 2024-02-14 | 1 | -345/+0 |
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| * | stm32/rcc: some f3 fixes. | Dario Nieuwenhuis | 2024-02-13 | 1 | -2/+3 |
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| * | stm32/rcc: port F3 RCC to new API | Dario Nieuwenhuis | 2024-02-12 | 1 | -363/+246 |
| | | | | | See #2515 | ||||
| * | stm32: autogenerate clocks struct, enable mux for all chips. | Dario Nieuwenhuis | 2024-02-02 | 1 | -10/+12 |
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| * | STM32: Remove vestigal build.rs cfgs, add new flashsize_X and package_X ↵ | Adam Greig | 2023-11-25 | 1 | -4/+1 |
| | | | | | cfgs, use in F3 RCC | ||||
| * | stm32: update metapac | xoviat | 2023-10-17 | 1 | -2/+2 |
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| * | rcc: ahb/apb -> hclk/pclk | xoviat | 2023-10-15 | 1 | -5/+5 |
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| * | stm32/rcc: add LSE/LSI to all chips, add RTC to more chips. | Dario Nieuwenhuis | 2023-10-11 | 1 | -3/+4 |
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| * | stm32/rcc: use more PLL etc enums from PAC. | Dario Nieuwenhuis | 2023-10-11 | 1 | -113/+74 |
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| * | stm32: generate adc_common | xoviat | 2023-09-15 | 1 | -4/+10 |
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| * | stm32/f3: add high res for hrtim and misc. | xoviat | 2023-09-10 | 1 | -70/+129 |
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| * | stm32: add initial adc f3 impl | xoviat | 2023-09-05 | 1 | -1/+92 |
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| * | stm32/rcc: rename common to bus | xoviat | 2023-08-27 | 1 | -3/+3 |
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| * | rustfmt | xoviat | 2023-06-30 | 1 | -0/+1 |
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| * | Refactor IWDG to use LSI frequency from RCC | chemicstry | 2022-07-10 | 1 | -6/+10 |
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| * | stm32/rcc: Modify only relevant CFGR bits and keep the settings previously done. | Ralf | 2022-05-12 | 1 | -6/+11 |
| | | | | | | PLL settings remained intact because these bits are not writable when PLL is enabled, but prescaler settings were overwritten by selecting PLL as sysclk (CFGR.SW[1:0]). | ||||
| * | stm32/rcc: Set flash prefetch buffer and half cycle access according to AHB ↵ | Ralf | 2022-05-12 | 1 | -1/+8 |
| | | | | | clock prescaler | ||||
| * | stm32/rcc: fix f3 build failure. | Dario Nieuwenhuis | 2022-02-23 | 1 | -1/+1 |
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| * | Update stm32-data | Dario Nieuwenhuis | 2022-02-14 | 1 | -7/+3 |
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| * | stm32f3: fix nonexistent cfg tests | Greg V | 2022-02-02 | 1 | -2/+2 |
| | | | | | | | | | The rcc code was taken from stm32-rs which uses 'x' features, but embassy uses features with full chip names. Add these 'x' wildcards as cfgs and use them in rcc. They will be useful for USB too. | ||||
| * | stm32/rcc: remove Rcc struct, RccExt trait. | Dario Nieuwenhuis | 2022-01-05 | 1 | -248/+205 |
| | | | | | All the RCC configuration is executed in init(). | ||||
| * | stm32/rcc: change family-specific code from dirs to single files. | Dario Nieuwenhuis | 2022-01-04 | 1 | -0/+374 |
| Consistent with how other peripherals handle their versions. | |||||
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