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path: root/embassy-stm32/src/rcc/mco.rs
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* Merge branch main into n6everdrone2025-11-111-5/+22
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| * Rustfmt for edition 2024.Dario Nieuwenhuis2025-10-061-2/+2
| * stm32: add config to MCO to control the drive strength.Daniel Nilsson2025-10-011-3/+20
* | Use N6 registers for MCOxSEL and MCOxPREeverdrone2025-09-211-1/+3
* | Add N6 family RCC configeverdrone2025-09-201-2/+4
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* stm32/afio: make af_num() unavailable in afio chips.Dario Nieuwenhuis2025-09-061-1/+1
* Added rcc_c0v2 to fix undefined McoSource with STM32C071obe1line2025-07-211-1/+1
* stm32: fix stm32g0b0 build.Dario Nieuwenhuis2025-07-161-1/+1
* Remove Peripheral trait, rename PeripheralRef->Peri.Dario Nieuwenhuis2025-03-271-11/+4
* stm32/gpio: refactor AfTypeJan Špaček2024-06-161-3/+2
* stm32: add support for STM32H7[RS] "bootflash line", add HIL tests.Dario Nieuwenhuis2024-05-011-2/+24
* Add stm32u0 support.Dario Nieuwenhuis2024-04-141-1/+1
* stm32: use private_bounds for sealed traits.Dario Nieuwenhuis2024-03-231-14/+13
* stm32/rcc: port F0 to new API.Dario Nieuwenhuis2024-02-131-3/+3
* stm32/rcc: port F3 RCC to new APIDario Nieuwenhuis2024-02-121-11/+13
* stm32: implement MCO for all chips.Dario Nieuwenhuis2023-10-071-26/+32
* Add MCO support for stm32wl familyshakencodes2023-10-061-7/+17
* stm32/rcc: unify h5 and h7.Dario Nieuwenhuis2023-09-211-0/+71
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