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path: root/embassy-stm32/src/timer/complementary_pwm.rs
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* stm32: create new complementary pwm pin with configFabien Trégan2025-12-091-4/+23
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* docxoviat2025-12-031-3/+1
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* timer: restore waveform methodxoviat2025-12-031-2/+22
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* timer: use u32 for high-level apixoviat2025-12-011-6/+6
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* timer: clamp compare value before dmaxoviat2025-12-011-2/+2
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* timer: allow 16 bit dma buffers for 32 bit timers.xoviat2025-12-011-4/+14
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* stm32/timer: enable channels for waveform_up multixoviat2025-11-271-0/+5
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* stm32: use typelevel timer typexoviat2025-11-271-9/+9
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* cleanup low-level timer methodsxoviat2025-11-251-4/+7
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* stm32: remove waveform methodxoviat2025-11-251-6/+0
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* Merge branch 'timer_update_management' of github.com:WattStep/embassy into timexoviat2025-11-151-4/+6
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| * Add separate method for generating update event. Make sure values are loaded ↵Jakob2025-11-151-7/+7
| | | | | | | | into shadow registers before starting the timer.
| * Avoid generating update events when chaning timer period. Set frequency ↵Jakob2025-11-151-4/+6
| | | | | | | | update methods to return applied ARR values which then can be used for calcualting new CCR values.
* | Add dma waveform methods to complementary pwm tooAlbin Hedman2025-11-151-0/+48
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* | Move dma waveform methods down to low level timerAlbin Hedman2025-11-151-53/+2
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* Implement into_ring_buffered for g4. Add methods for configuring injected ↵Jakob2025-11-041-1/+11
| | | | sampling for g4.
* Rustfmt for edition 2024.Dario Nieuwenhuis2025-10-061-3/+3
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* stm32/afio: make af_num() unavailable in afio chips.Dario Nieuwenhuis2025-09-061-5/+3
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* stm32/afio: make the A generic param only appear in chips with AFIO.Dario Nieuwenhuis2025-09-051-13/+13
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* stm32/afio: use type inference for timer remaps as well.Dario Nieuwenhuis2025-09-051-24/+15
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* Add STM32F1 AFIO remapFabian Wolter2025-09-051-11/+23
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* Merge pull request #4368 from nikvoid/stm32-complementary-pwm-dmaDario Nieuwenhuis2025-09-051-0/+60
|\ | | | | stm32: add `waveform_up` function for complementary PWM too
| * stm32: add `waveform_up` function for complementary PWM toonikvoid2025-07-161-0/+60
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* | Added timer set polarity functions for main and complementary outputs ↵r.marple2025-09-031-0/+10
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* | Remove unrelated cahngesJakob2025-08-101-15/+1
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* | Adjust which methods should have mut reference to self. Change ↵Jakob2025-08-101-19/+18
| | | | | | | | set_output_idle_state to accept channel iterator as input
* | Add enum for IdlePolarity to make interface clearer for ↵Jakob2025-08-101-7/+17
| | | | | | | | set_output_idle_state method
* | Change method arugments to be non-mutableJakob2025-08-101-6/+6
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* | Add get methods for meo, ossi and ossrJakob2025-08-101-0/+15
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* | Add methods for setting ossi, ossr, osi and oisn along with software trigger ↵Jakob2025-08-101-1/+44
| | | | | | | | for break input
* | Merge pull request #4302 from Jacke-debug/get_max_duty_off_by_oneDario Nieuwenhuis2025-07-241-2/+10
|\ \ | | | | | | | | | Get max duty off by one for Center-aligned mode
| * | Also update the AdvancedInstace4Channel versionJakob2025-06-111-1/+5
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| * | Add separate case for center aligned modeJakob2025-06-111-1/+5
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| * | Remove incorrect addition of 1 to get_max_dutyJakob2025-06-111-1/+1
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* | | Merge pull request #4303 from Jacke-debug/autoreload_preloadDario Nieuwenhuis2025-07-241-0/+1
|\ \ \ | |_|/ |/| | | | | Enable autoreload_preload for Complementary PWM
| * | Enable autoreload_preload for complementary PWMJakob2025-06-111-0/+1
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* | stm32: rename timer channel trait; replace impls via macro with impls ↵melvdl2025-06-271-19/+14
| | | | | | | | generic over timer channels
* | stm32: generify timer channelsmelvdl2025-06-261-39/+33
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* Test for dead-time computation correctedEkaterina Savelyeva2025-04-251-1/+1
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* Dead-time computation in complementary PWM fixed (missing DTG msbs added)Ekaterina Savelyeva2025-04-251-3/+3
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* Remove Peripheral trait, rename PeripheralRef->Peri.Dario Nieuwenhuis2025-03-271-8/+6
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* stm32/timer: avoid max_compare_value >= u16::MAXAurélien Jacobs2024-11-201-1/+1
| | | | | | | | | | With STM32 32 bits timers, the max_compare_value (AKA, ARR register) can currently be set greater than u16::MAX, which leads to the following assert!(max < u16::MAX as u32) in max_duty_cycle() when setting up a 1 kHz SimplePwm on 84 MHz MCU. The issue is fixed by forcing a max_compare_value that fits into 16 bits when setting the frequency for a PWM.
* stm32/gpio: refactor AfTypeJan Špaček2024-06-161-3/+4
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* stm32/timer: simplify traits, convert from trait methods to struct.Dario Nieuwenhuis2024-03-231-19/+19
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* Fix warnings in recent nightly.Dario Nieuwenhuis2024-03-201-1/+0
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* restore original public API of timer, but keep new PACeZio Pan2024-02-101-23/+18
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* add methods with macroeZio Pan2024-02-101-24/+28
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* update timer mod after stm32-metapac timer_v2eZio Pan2024-02-091-1/+1
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* refactor with clippyeZio Pan2024-01-061-1/+2
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* stm32/timer: docs.Dario Nieuwenhuis2023-12-191-6/+25
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