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path: root/embassy-stm32/src/timer
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* Merge branch 'main' into mainRaul Alimbekov2025-12-169-439/+773
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| * add get_frequency to stm32 pwm channelstidely2025-12-111-0/+10
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| * stm32: create new complementary pwm pin with configFabien Trégan2025-12-091-4/+23
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| * low-power: improve debug logicxoviat2025-12-061-2/+2
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| * docxoviat2025-12-033-6/+5
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| * timer: restore waveform methodxoviat2025-12-033-6/+65
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| * timer: use u32 for high-level apixoviat2025-12-012-22/+18
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| * timer: clamp compare value before dmaxoviat2025-12-013-4/+17
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| * timer: allow 16 bit dma buffers for 32 bit timers.xoviat2025-12-014-40/+49
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| * stm32/timer: enable channels for waveform_up multixoviat2025-11-272-0/+10
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| * stm32: use typelevel timer typexoviat2025-11-278-168/+127
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| * fmtxoviat2025-11-251-3/+0
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| * pwm: cleanupxoviat2025-11-251-53/+0
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| * Merge branch 'feat/pwm_waveform_continuous' of ↵xoviat2025-11-251-0/+53
| |\ | | | | | | | | | github.com:KorribanMaster/embassy into pwm
| | * fix: Formatting, use nightly...Eicke Hecht2025-11-241-2/+1
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| | * fix: formattingEicke Hecht2025-11-241-1/+1
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| | * wip: Add a working example for the stm32f767zi nucleo. Currently no PWM ↵Eicke Hecht2025-11-241-0/+2
| | | | | | | | | | | | signal visible...
| | * fix: Warnings and formatting all fixedEicke Hecht2025-11-243-15/+45
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| | * feat: Implement basic ring buffered PWM channelEicke Hecht2025-11-243-25/+163
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| | * wip: adding basic ringbuffered structureEicke Hecht2025-11-232-0/+48
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| | * fix: Fix waveform for channels > 1 and disallow for unsupported dmasEicke Hecht2025-11-231-3/+9
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| | * feat: Add generation of a continuous waveforms for SimplePWMEicke Hecht2025-11-192-2/+48
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| * | timer: add writable ring bufferxoviat2025-11-254-1/+235
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| * | cleanup low-level timer methodsxoviat2025-11-253-100/+59
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| * | stm32: remove waveform methodxoviat2025-11-253-49/+0
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| * timer: add note about disruptionxoviat2025-11-151-1/+2
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| * Merge branch 'timer_update_management' of github.com:WattStep/embassy into timexoviat2025-11-155-15/+25
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| | * Add separate method for generating update event. Make sure values are loaded ↵Jakob2025-11-155-21/+35
| | | | | | | | | | | | into shadow registers before starting the timer.
| | * Avoid generating update events when chaning timer period. Set frequency ↵Jakob2025-11-153-24/+20
| | | | | | | | | | | | update methods to return applied ARR values which then can be used for calcualting new CCR values.
| * | Add dma waveform methods to complementary pwm tooAlbin Hedman2025-11-151-0/+48
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| * | Move dma waveform methods down to low level timerAlbin Hedman2025-11-153-264/+224
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| * Merge pull request #4833 from plaes/stm32-pwm-docs-miscxoviat2025-11-141-3/+10
| |\ | | | | | | | | | stm32/timer/simplepwm: Fix docs formatting and clarify timer usage
| | * stm32/timer/simplepwm: Fix docs formatting and clarify timer usagePriit Laes2025-11-041-3/+10
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| * | Merge branch 'embassy-rs:main' into fix/simple-pwm-32bit-timer-supportchasingRs2025-11-103-14/+88
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| | * \ Merge branch 'main' into into_ring_buffered_adc_for_g4Jakob2025-11-071-2/+2
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| | | * | stm32/stop: move stop_with_rtc into initxoviat2025-11-041-2/+2
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| | * / Implement into_ring_buffered for g4. Add methods for configuring injected ↵Jakob2025-11-042-1/+21
| | |/ | | | | | | | | | sampling for g4.
| | * timer/low_level: add ability to set master modexoviat2025-10-281-1/+6
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| | * timer: add output compare valuesxoviat2025-10-271-10/+59
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| * | Merge branch 'embassy-rs:main' into fix/simple-pwm-32bit-timer-supportchasingRs2025-10-106-41/+75
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| | * Rustfmt for edition 2024.Dario Nieuwenhuis2025-10-066-8/+8
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| * | fix: correct register access for SimplePwm 32-bit timer supportpkj2025-09-281-2/+2
| | | | | | | | | | | | | | | | | | - Replace `regs_gp16().ccr()` with `regs_1ch().ccr()` for proper register access - Fix variable name from `cc_channel` to `channel` - Ensure PWM waveform generation works correctly with 32-bit timer mode
| * | stm32/timer: Support 32-bit timers in SimplePwm waveform_up methodpkj2025-09-281-8/+27
| | | | | | | | | | | | | | | Add TimerBits matching following waveform method pattern to handle both 16-bit and 32-bit timer DMA transfers with appropriate pointer types.
* | | style: cargo fmtRaulIQ2025-10-021-1/+2
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* | | fix: correct DMA configuration and registers in receive_waveformRaulIQ2025-10-021-4/+7
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* | | add DMA-based input capture for timer channelsRaulIQ2025-09-301-0/+38
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* | Remove 'new_with_config()', just use 'new()'Brian Schwind2025-09-291-9/+0
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* | Add a Config struct for the Qei peripheralBrian Schwind2025-09-291-5/+60
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* | Remove the QeiPin structBrian Schwind2025-09-291-23/+0
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* | Make the Qei struct own the channel 1 and 2 pinsBrian Schwind2025-09-291-7/+18
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