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path: root/embassy-stm32/src/ucpd.rs
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* cfg out unused itemseverdrone2025-11-111-1/+2
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* Rustfmt for edition 2024.Dario Nieuwenhuis2025-10-061-2/+2
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* fix: buildelagil2025-09-051-2/+2
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* fix: modified dma channel state managementetiennecollin2025-09-051-2/+2
| | | | | See https://github.com/embassy-rs/embassy/pull/3923#discussion_r2094570176
* ucpd: Add software trim setting of the CC Rp/Rd for stm32u5 parts.Piotr Esden-Tempski2025-08-011-0/+31
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* Remove Peripheral trait, rename PeripheralRef->Peri.Dario Nieuwenhuis2025-03-271-12/+10
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* fix: UCPD drop logicelagil2025-02-071-6/+11
| | | | Read rxpaysz immediately
* fix: STM32H5 UCPD receptionelagil2025-01-261-6/+14
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* chore: fix buildelagil2025-01-031-5/+5
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* chore: clean up stm32h5 ucpdelagil2025-01-031-14/+8
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* fix: docstringselagil2024-12-221-2/+2
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* fix: h5-only rx filterelagil2024-12-221-0/+2
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* feat: stm32h5 UCPD exampleelagil2024-12-221-0/+40
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* [UCPD] Add support for non-SOP packetsSjoerd Simons2024-08-181-4/+73
| | | | | | | | Allow capturing (and distinguishing) non-SOP packets as well. The default configuration will just configure SOP packets. For ease of use the default receive function signature is unchanged as for PD sinks (which is likely the common usage) just SOP is enough so no need to differentiate.
* [USPD] clear interrupt flags right after receptionSjoerd Simons2024-06-161-7/+6
| | | | | | | | | | | Clearing the interrupt flags at beginning of reception will masks overruns and cause corrupted packets to be received. Instead clear the flags right after disabling the interrupt/after reception, so overruns on the next receive can be caught. Tested by forcing overruns due to explicit sleeps Signed-off-by: Sjoerd Simons <[email protected]>
* [UCPD] Don't disable ucpd rx after each receptionSjoerd Simons2024-06-161-2/+4
| | | | | | | | When disabling the UCPD RX after every reception it's relatively easy to drop packets. This seems to happen in particular with GoodCRC packets which can be sent very quickly by a receiver. To avoid this enable reception as soon as the pd phy get split out (preparing for packet processing) and only disable again when the pd phy gets dropped.
* stm32/rcc: replace generated enable/disable code with runtime infoJan Špaček2024-05-251-4/+4
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* [UCPD] Use `ChannelAndRequest` helperTimo Kröger2024-05-101-24/+16
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* Fix PeripheralRef soundness issue allowing &T.Dario Nieuwenhuis2024-05-071-11/+11
| | | | | | Fix soundness issue introduced in a previous soundness fix https://github.com/embassy-rs/embassy/pull/2602 . PeripheralRef must not implement DerefMut itself, but the blanket impl must still require DerefMut. Otherwise you can create two instances of a driver on the same uart by using `&my_uart`.
* stm32: add support for STM32H7[RS] "bootflash line", add HIL tests.Dario Nieuwenhuis2024-05-011-1/+1
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* stm32: use private_bounds for sealed traits.Dario Nieuwenhuis2024-03-231-31/+29
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* [UCPD] Fix dead-battery disable for G0Timo Kröger2024-03-151-2/+2
| | | | Inverted flag got missed in the original PR.
* [UCPD] Enable RX PHY only when receivingTimo Kröger2024-03-141-38/+23
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* [UCPD] Set CC pins to analog modeTimo Kröger2024-03-141-2/+6
| | | | Example: On STM32G431 CC2 has a pull-up (default JTAG signal) which needs to be disabled.
* [UCPD] RXORDSETEN can only be modified when disabledTimo Kröger2024-03-141-10/+9
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* [UCPD] Fix hard reset interrupt disable flagsTimo Kröger2024-03-141-2/+2
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* [UCPD] Adjust TX clock dividerTimo Kröger2024-03-141-4/+2
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* [UCPD] Take interrupt in constructor and enable itTimo Kröger2024-03-141-0/+6
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* [UCPD] Disable dead-battery resistor for all familiesTimo Kröger2024-03-121-12/+46
| | | | | | | Using the code from PR #2683, thank you @ExplodingWaffle Removes the dead-battery as selectable option because its unclear if it can be re-enabled. Also there is no use case for it because the same resistor can be configured with the sink option.
* [UCPD] Disable RCC clock on dropTimo Kröger2024-03-121-0/+2
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* [UCPD] Split into CC and PD phyTimo Kröger2024-03-121-76/+135
| | | | | PD3.0 spec requires concurrent control of CC resistors for collision avoidance. Needed to introduce some "ref counting" (its just a bool) for drop code.
* [UCPD] Fix build for devices with GPDMATimo Kröger2024-03-121-7/+1
| | | | | Do not use a flag that is DMA/BDMA only, not required anyway the transfer should run in the background nevertheless
* [UCPD] Implement hard reset transmissionTimo Kröger2024-03-121-0/+51
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* [UCPD] Receive hard resetsTimo Kröger2024-03-121-7/+35
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* [UCPD] Improve example and defmt Format for enumsTimo Kröger2024-03-121-0/+3
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* [UCPD] Combine RX and TXTimo Kröger2024-03-121-67/+58
| | | | | | | | `select(rx.receive(), tx.transmit()` had subtle interrupt enable race conditions. Combine receiver and transmitter into one new `PdPhy` struct to disallow the problematic pattern. Scanning through the USB PD 2.0 specification there is no need to have RX and TX running concurrently (after all the USB PD communication is half-duplex).
* [UCPD] Implement PD transmitterTimo Kröger2024-03-121-1/+80
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* [UCPD] Implement PD receiverTimo Kröger2024-03-121-2/+97
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* [UCPD] Prepare for PD communication implementationTimo Kröger2024-03-121-1/+46
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* [UCPD] Improve Type-C CC handlingTimo Kröger2024-03-121-22/+40
| | | | | | * Improved interrupt handling: Clear flags in ISR, check state change in future * Disable pull-up/pull-down resistors and voltage monitor on drop * nightly rustfmt
* [UCPD] Configuration Channel (CC) handlingTimo Kröger2024-03-121-4/+165
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* [UCPD] Prepare interrupt handleTimo Kröger2024-03-121-2/+31
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* [UCPD] Instance and Pin TraitsTimo Kröger2024-03-121-0/+28
Skip FRSTX pin for now. Its available twice in the device JSON as FRSTX1 and FRSTX2 both with the same pins as targets. I don’t know enough about the FRS (fast role switch) feature to understand if that is correct and how to handle the pins.
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