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path: root/embassy-stm32/src/usart/buffered.rs
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* fix: fix incorrect logic for buffered usart transmission complete.xoviat2025-11-181-1/+1
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* Rustfmt for edition 2024.Dario Nieuwenhuis2025-10-061-3/+3
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* STM32: USART: Change eager_reads from bool to Option<usize>Adam Greig2025-10-011-9/+19
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* STM32: USART: Make BufferedUartRx return all available bytes when they wrap ↵Adam Greig2025-10-011-14/+23
| | | | around the internal buffer end
* STM32: USART: Add `eager_reads` config optionAdam Greig2025-10-011-2/+16
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* stm32/usart: fix blocking flushBirk Tjelmeland2025-09-101-1/+3
| | | | | | | The PR in #2416 fixes buffered usart flushing, but only for the async functions. This commit introduces the same fixes to the blocking functions.
* stm32/afio: make the A generic param only appear in chips with AFIO.Dario Nieuwenhuis2025-09-051-24/+24
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* Add STM32F1 AFIO remapFabian Wolter2025-09-051-24/+24
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* Fix stm32 buffered half-duplex uart receivechemicstry2025-07-161-0/+2
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* stm32: Assert in BufferedUart that the buffers are not empty.Kevin P. Fleming2025-05-251-0/+2
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* Merge pull request #3965 from toon23/stm32_usart-pin_configDario Nieuwenhuis2025-04-181-20/+18
|\ | | | | | | Stm32 usart: implement pin config for cts, tx, rts and de
| * FormatAnton Pöhl2025-04-111-2/+2
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| * Stm32 usart: remove HalfDuplexConfigAnton Pöhl2025-04-111-5/+3
| | | | | | | | The pin parameters of usart::Config are used instead.
| * Stm32 usart: make pin modes of cts, tx, rts and de configurableAnton Pöhl2025-04-111-14/+14
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* | BufferedUart initializationMichael Gomez2025-04-041-5/+5
|/ | | | | | | This change modifies UART initialization throughout Embassy to take pins before interrupts. Related to #1304.
* Remove Peripheral trait, rename PeripheralRef->Peri.Dario Nieuwenhuis2025-03-271-41/+41
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* Merge pull request #3915 from embedded-rust-iml/fix/BufferedUartRx-nb-readDario Nieuwenhuis2025-02-241-19/+10
|\ | | | | | | fix: BufferedUartRx embedded_hal_nb::serial::Read impl
| * fix: Check buffer full before pop_done()Maximilian Rozwora2025-02-241-3/+4
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| * Apply cargo formatMaximilian Rozwora2025-02-241-1/+1
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| * fix: BufferedUartRx embedded_hal_nb::serial::Read implMaximilian Rozwora2025-02-241-19/+9
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* | doc: Fix "the the"Ronald Weber2025-02-191-2/+2
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* stm32/usart: half-duplex support for buffered usartDaniel Trnka2024-12-221-2/+98
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* Extend set_baudrate implementation to Buffered and RingBuffered structsEnmanuel Parache2024-12-031-2/+19
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* Split_ref with shortened lifetime. When borrowed skip drop on rx and txKenneth Knudsen2024-11-061-26/+52
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* add split_ref for stm32 uartKenneth Knudsen2024-11-041-0/+7
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* :memo: fix wrong commentLucas Martins2024-10-211-2/+2
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* fmtLucas Martins2024-10-211-1/+0
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* add uart permutations usefull for rs485Lucas Martins2024-10-211-0/+49
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* stm32: add RX Pull configuration option to USARTBeat Küng2024-10-121-2/+2
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* stm32/usart: sending break character in buffered usartDaniel Trnka2024-08-281-2/+12
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* stm after cargo fixrafael2024-07-141-4/+4
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* stmrafael2024-07-141-0/+18
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* stm32/gpio: refactor AfTypeJan Špaček2024-06-161-10/+10
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* stm32/usart: set refcount even if initialization failedJan Špaček2024-06-031-1/+1
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* stm32/usart: move init code to function that's not generic in TJan Špaček2024-06-011-28/+40
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* stm32/buffered-usart: use new_pin! and disconnect pins on dropJan Špaček2024-06-011-39/+63
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* stm32/rcc: replace generated enable/disable code with runtime infoJan Špaček2024-05-251-4/+5
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* stm32/usart: remove instance generic paramsJan Špaček2024-05-231-171/+201
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* stm32/usart: remove wildcard import.Dario Nieuwenhuis2024-04-261-2/+15
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* stm32: remove last few mod sealed's.Dario Nieuwenhuis2024-04-051-21/+17
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* STM32 BufferedUart: wake receive task for each received byteRalf2024-03-211-1/+1
| | | | Fixes https://github.com/embassy-rs/embassy/issues/2719
* Fix warnings in recent nightly.Dario Nieuwenhuis2024-03-201-4/+1
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* stm32/usart: Add doc links to buffered uartsGrant Miller2024-02-031-0/+4
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* stm32 uart: fix buffered flush for usart_v1, usart_v2Andres Vahter2024-01-201-1/+6
| | | | There is one caveat. For some reason with first send using usart_v1/usart_v2 TC flag appears right after first byte from buffer is written to DR. Consecutive transfers work as expected - TC flag appears when last byte is fully transferred to wire.
* stm32 uart: remove unwrapAndres Vahter2024-01-201-2/+4
| | | | unwraps take more space because of panics
* stm32 uart: fix `flush` for non usart_v4 variantsAndres Vahter2024-01-201-18/+9
| | | | | Byte was written to TDR and right after that waker was called. This means `flush` would see that `tx_buf` is empty and can return Ready although actually hardware was still writing this last byte to the wire. With this change non `usart_v4 ` variants would also use TC interrupt to check when last byte was sent out.
* stm32 uart: do not wake after sending each byteAndres Vahter2024-01-201-3/+6
| | | | usart_v4 uses TC interrupt to see if all bytes are sent out from the FIFO and waker is called from this interrupt. This minimises unnecessary wakeups during sending.
* stm32: fix buffered uart flushAndres Vahter2024-01-201-0/+30
| | | | usart_v4 uses internal FIFO and therefore actually all bytes are not yet sent out although state.tx_buf.is_empty()
* make usart::State privateHarry Brooke2024-01-191-17/+19
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* Documented usart public APIBarnaby Walters2023-12-191-0/+12
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