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* | | | Align flash examplesRasmus Melchior Jacobsen2023-04-057-14/+15
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* | | | Align stm32 bootloader exampleRasmus Melchior Jacobsen2023-04-051-3/+4
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* | | Align examples with bootloader changesRasmus Melchior Jacobsen2023-04-043-8/+9
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* | | Merge #1321bors[bot]2023-04-0435-35/+35
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1321: executor: add Pender, rework Cargo features. r=Dirbaio a=Dirbaio This introduces a `Pender` struct with enum cases for thread-mode, interrupt-mode and custom callback executors. This avoids calls through function pointers when using only the thread or interrupt executors. Faster, and friendlier to `cargo-call-stack`. `embassy-executor` now has `arch-xxx` Cargo features to select the arch and to enable the builtin executors (thread and interrupt). Co-authored-by: Dario Nieuwenhuis <[email protected]>
| * | | executor: add Pender, rework Cargo features.Dario Nieuwenhuis2023-04-0335-35/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces a `Pender` struct with enum cases for thread-mode, interrupt-mode and custom callback executors. This avoids calls through function pointers when using only the thread or interrupt executors. Faster, and friendlier to `cargo-call-stack`. `embassy-executor` now has `arch-xxx` Cargo features to select the arch and to enable the builtin executors (thread and interrupt).
* | | | Merge #1313bors[bot]2023-04-042-26/+4
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1313: (embassy-stm32): rework bufferedUart to get rid of PeripheralMutex r=Dirbaio a=MathiasKoch New implementation is very similar to the implementation of embassy-nrf & embassy-rp. Also adds embedded-hal traits to bufferedUart. **NB**: Still needs testing on actual hardware Co-authored-by: Mathias <[email protected]>
| * | | | Fix interrupt handling so it is similar to before the rework, and fix examplesMathias2023-03-312-26/+4
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* | | | run fmtMathieu Dupont2023-04-031-1/+0
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* | | | Add MCO support for L4 and F4 familiesMathieu Dupont2023-04-032-0/+58
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* | | Example using the PIO to drive WS2812 aka Neopixel RGB ledsCaleb Jamison2023-03-112-0/+143
| | | | | | | | | | | | This example also uses a pio program compiled at runtime, rather than one built at compile time. There's no reason to do that, but it's probably useful to have an example that does this as well.
* | | Merge #1267bors[bot]2023-03-0810-14/+10
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1267: macros: better validation of function signatures. r=Dirbaio a=Dirbaio Fixes #1266 bors r+ Co-authored-by: Dario Nieuwenhuis <[email protected]>
| * | | Fix examples broken by the macro fix.Dario Nieuwenhuis2023-03-0810-14/+10
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* | | | Merge upstreamMehmet Ali Anil2023-03-0744-281/+344
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| * | | nrf/usb: switch to new interrupt binding, fix vbus detect on nrf53.Dario Nieuwenhuis2023-03-067-56/+76
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| * | | nrf/twis: switch to new interrupt binding.Dario Nieuwenhuis2023-03-061-5/+7
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| * | | nrf/temp: switch to new interrupt binding.Dario Nieuwenhuis2023-03-061-3/+6
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| * | | nrf/twim: switch to new interrupt binding.Dario Nieuwenhuis2023-03-062-6/+12
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| * | | nrf/spis: switch to new interrupt binding.Dario Nieuwenhuis2023-03-061-3/+6
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| * | | nrf/spim: switch to new interrupt binding.Dario Nieuwenhuis2023-03-063-9/+18
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| * | | nrf/saadc: switch to new interrupt binding.Dario Nieuwenhuis2023-03-062-4/+12
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| * | | nrf/rng: make available on all chips, use Instance trait, switch to new ↵Dario Nieuwenhuis2023-03-062-4/+12
| | | | | | | | | | | | | | | | interrupt binding.
| * | | nrf/qspi: switch to new interrupt binding.Dario Nieuwenhuis2023-03-062-6/+12
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| * | | nrf/qdec: make available on all chips, use Instance trait, switch to new ↵Dario Nieuwenhuis2023-03-061-3/+6
| | | | | | | | | | | | | | | | interrupt binding.
| * | | nrf/pdm: make available on all chips, use Instance trait, switch to new ↵Dario Nieuwenhuis2023-03-061-3/+7
| | | | | | | | | | | | | | | | interrupt binding.
| * | | nrf/i2s: switch to new interrupt binding.Dario Nieuwenhuis2023-03-063-14/+19
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| * | | nrf/timer: remove awaitable.Dario Nieuwenhuis2023-03-061-26/+0
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| * | | nrf/uart: switch to new interrupt binding.Dario Nieuwenhuis2023-03-065-16/+33
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| * | | Merge pull request #1232 from embassy-rs/nrf-qspi-fixesDario Nieuwenhuis2023-03-052-7/+13
| |\ \ \ | | | | | | | | | | nrf/qspi: nrf53 support, u32 addrs, remove const generic, add raw read/write.
| | * | | nrf/qspi: add _raw variants of methods that don't do bounds checks.Dario Nieuwenhuis2023-03-052-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | Useful for the nRF7002, which presents as a "fake" QSPI flash, and the "capacity" concept doesn't really apply to it.
| | * | | nrf/qspi: remove FLASH_SIZE const generic param.Dario Nieuwenhuis2023-03-052-2/+2
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| | * | | nrf/qspi: always use u32 for addresses.Dario Nieuwenhuis2023-03-051-5/+5
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| * | | | nrf/buffered_uarte: make available on stable.Dario Nieuwenhuis2023-03-041-1/+1
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| * | | | nrf/buffered_uarte: remove PeripheralMutex, make it work without rts/cts.Dario Nieuwenhuis2023-03-041-9/+3
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | > dirbaio: so I was checking how zephyr does UARTE RX on nRF > dirbaio: because currently we have the ugly "restart DMA on line idle to flush it" hack > dirbaio: because according to the docs "For each byte received over the RXD line, an RXDRDY event will be generated. This event is likely to occur before the corresponding data has been transferred to Data RAM." > dirbaio: so as I understood it, the only way to guarantee the data is actually transferred to RAM is to stop+restart DMA > dirbaio: well, guess what? > dirbaio: they just count RXDRDY's, and process that amount of data without restarting DMA > dirbaio: with a timer configured as counter https://github.com/zephyrproject-rtos/zephyr/blob/main/drivers/serial/uart_nrfx_uarte.c#L650-L692 > dirbaio: 🤔🤷⁉️ > dirbaio: someone saying you can do the "hook up rxdrdy to a counter" trick, someone else saying it's wrong 🤪 https://devzone.nordicsemi.com/f/nordic-q-a/28420/uarte-in-circular-mode So we're going to do just that! - BufferedUarte is lock-free now. No PeripheralMutex. - The "restart DMA on line idle to flush it" hack is GONE. This means - It'll work correctly without RTS/CTS now. - It'll have better throughput when using RTS/CTS.
| * | | Merge pull request #1244 from embassy-rs/interruptexecutorDario Nieuwenhuis2023-03-015-49/+89
| |\ \ \ | | | | | | | | | | cortex-m/executor: don't use the owned interrupts system.
| | * | | cortex-m/executor: don't use the owned interrupts system.Dario Nieuwenhuis2023-02-285-49/+89
| | | | | | | | | | | | | | | | | | | | Preparation for #1224.
| * | | | Example fixes.Dario Nieuwenhuis2023-03-016-56/+11
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| * | | examples/std: fix net running out of sockets.Dario Nieuwenhuis2023-02-263-3/+3
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* | | | Bump embedded-storage-async to 0.4Mehmet Ali Anil2023-03-062-2/+2
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* | | stm32/sdmmc: Implement proper clock configurationchemicstry2023-02-232-1/+3
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* | | nrf: rename UARTETWISPIn -> SERIALnDario Nieuwenhuis2023-02-211-1/+1
| | | | | | | | | | | | | | | The UARTETWISPIn naming is quite horrible. With the nRF53, Nordic realized this and renamed the interrupts to SERIALn. Let's copy that for our peripheral names, in nrf53 and nrf91.
* | | examples/stm32wb: do not reserve words at start of RAM.Dario Nieuwenhuis2023-02-201-1/+1
| | | | | | | | | | | | | | | | | | | | | They're used to communicate from the app to ST's OTA bootloader. See AN5247. This bootloader is optional, must be flashed by the user, and requires changing the FLASH start address as well, so the current memory regions still require modifications to use it. Therefore there's no point in reserving these words. Thanks @adamgreig for investigating the purpose.
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*-. \ \ Merge #1218 #1219bors[bot]2023-02-191-2/+37
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1218: Lora: sx126x: Change timing window to match values found experimentally. r=Dirbaio a=CBJamo As mentioned in #1188. 1219: stm32/sdmmc: Fix SDIOv1 writes r=Dirbaio a=chemicstry This fixes writes on sdmmc v1 (SDIO). I'm pretty sure I tested writes in #669, but maybe I was just lucky or I just forgot. There were two problems: - Writes require DMA FIFO mode, otherwise SDIO FIFO is under/overrun depending on sdio/pclk2 clock ratio. - Hardware flow control is broken for sdmmc v1 (I checked F1 and F4 erratas). This causes clock glitches above 12 MHz and results in write CRC errors. Co-authored-by: Caleb Jamison <[email protected]> Co-authored-by: chemicstry <[email protected]>
| | * | | stm32/sdmmc: Fix SDIOv1 writeschemicstry2023-02-181-2/+37
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* | | | Merge #1217bors[bot]2023-02-192-2/+2
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1217: Fix a typo in "PioPeripheral" r=Dirbaio a=SekoiaTree Renames "PioPeripherial" to "PioPeripheral" (without the second i). Co-authored-by: sekoia <[email protected]>
| * | | | Fix a typo in "PioPeripheral"sekoia2023-02-152-2/+2
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* / / / examples/stm32wb: fix linker script.Dario Nieuwenhuis2023-02-191-1/+1
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | cortex-m-rt 0.7.2 now enforces the stack is 8-byte aligned. Stack is placed at `ORIGIN(RAM) + LENGTH(RAM)` by default, which wasn't 8-byte-aligned. See https://github.com/rust-embedded/cortex-m/discussions/469 ST trims 8 bytes from start of RAM, and uses the whole 192kb, so let's just copy that: https://github.com/STMicroelectronics/STM32CubeWB/blob/bceb1dae09f912eae47fba059251d499ba32f4ca/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/linker/stm32wb55xx_flash_cm4.ld#L48
* | | fix h7 examplesDario Nieuwenhuis2023-02-102-1/+24
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* | | exmaples/dns: don't use the socket.Dario Nieuwenhuis2023-02-101-6/+3
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* | | Rewrite to use a single socketUlf Lilleengen2023-02-101-2/+1
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* | | Add DNS socket to embassy-netUlf Lilleengen2023-02-102-1/+103
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