diff options
| author | Dario Nieuwenhuis <[email protected]> | 2022-11-21 23:31:31 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2022-11-25 21:02:06 +0100 |
| commit | 1e2fb0459d8546ba658bb9fe150be5f1f537b48e (patch) | |
| tree | eb40a5027581896c7b78db58f509431ed6b11892 /embassy-embedded-hal/src/shared_bus/asynch/i2c.rs | |
| parent | 758f5d7ea29f1df14d5ef59c82e4b7f22545d775 (diff) | |
Switch to async-fn-in-trait
Diffstat (limited to 'embassy-embedded-hal/src/shared_bus/asynch/i2c.rs')
| -rw-r--r-- | embassy-embedded-hal/src/shared_bus/asynch/i2c.rs | 107 |
1 files changed, 39 insertions, 68 deletions
diff --git a/embassy-embedded-hal/src/shared_bus/asynch/i2c.rs b/embassy-embedded-hal/src/shared_bus/asynch/i2c.rs index 0bc6afd98..c5e1fd415 100644 --- a/embassy-embedded-hal/src/shared_bus/asynch/i2c.rs +++ b/embassy-embedded-hal/src/shared_bus/asynch/i2c.rs | |||
| @@ -22,7 +22,6 @@ | |||
| 22 | //! let i2c_dev2 = I2cDevice::new(i2c_bus); | 22 | //! let i2c_dev2 = I2cDevice::new(i2c_bus); |
| 23 | //! let mpu = Mpu6050::new(i2c_dev2); | 23 | //! let mpu = Mpu6050::new(i2c_dev2); |
| 24 | //! ``` | 24 | //! ``` |
| 25 | use core::future::Future; | ||
| 26 | 25 | ||
| 27 | use embassy_sync::blocking_mutex::raw::RawMutex; | 26 | use embassy_sync::blocking_mutex::raw::RawMutex; |
| 28 | use embassy_sync::mutex::Mutex; | 27 | use embassy_sync::mutex::Mutex; |
| @@ -55,53 +54,39 @@ where | |||
| 55 | M: RawMutex + 'static, | 54 | M: RawMutex + 'static, |
| 56 | BUS: i2c::I2c + 'static, | 55 | BUS: i2c::I2c + 'static, |
| 57 | { | 56 | { |
| 58 | type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; | 57 | async fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> { |
| 59 | 58 | let mut bus = self.bus.lock().await; | |
| 60 | fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> { | 59 | bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?; |
| 61 | async move { | 60 | Ok(()) |
| 62 | let mut bus = self.bus.lock().await; | ||
| 63 | bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?; | ||
| 64 | Ok(()) | ||
| 65 | } | ||
| 66 | } | 61 | } |
| 67 | 62 | ||
| 68 | type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; | 63 | async fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Result<(), I2cDeviceError<BUS::Error>> { |
| 69 | 64 | let mut bus = self.bus.lock().await; | |
| 70 | fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Self::WriteFuture<'a> { | 65 | bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?; |
| 71 | async move { | 66 | Ok(()) |
| 72 | let mut bus = self.bus.lock().await; | ||
| 73 | bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?; | ||
| 74 | Ok(()) | ||
| 75 | } | ||
| 76 | } | 67 | } |
| 77 | 68 | ||
| 78 | type WriteReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; | 69 | async fn write_read<'a>( |
| 79 | |||
| 80 | fn write_read<'a>( | ||
| 81 | &'a mut self, | 70 | &'a mut self, |
| 82 | address: u8, | 71 | address: u8, |
| 83 | wr_buffer: &'a [u8], | 72 | wr_buffer: &'a [u8], |
| 84 | rd_buffer: &'a mut [u8], | 73 | rd_buffer: &'a mut [u8], |
| 85 | ) -> Self::WriteReadFuture<'a> { | 74 | ) -> Result<(), I2cDeviceError<BUS::Error>> { |
| 86 | async move { | 75 | let mut bus = self.bus.lock().await; |
| 87 | let mut bus = self.bus.lock().await; | 76 | bus.write_read(address, wr_buffer, rd_buffer) |
| 88 | bus.write_read(address, wr_buffer, rd_buffer) | 77 | .await |
| 89 | .await | 78 | .map_err(I2cDeviceError::I2c)?; |
| 90 | .map_err(I2cDeviceError::I2c)?; | 79 | Ok(()) |
| 91 | Ok(()) | ||
| 92 | } | ||
| 93 | } | 80 | } |
| 94 | 81 | ||
| 95 | type TransactionFuture<'a, 'b> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a, 'b: 'a; | 82 | async fn transaction<'a, 'b>( |
| 96 | |||
| 97 | fn transaction<'a, 'b>( | ||
| 98 | &'a mut self, | 83 | &'a mut self, |
| 99 | address: u8, | 84 | address: u8, |
| 100 | operations: &'a mut [embedded_hal_async::i2c::Operation<'b>], | 85 | operations: &'a mut [embedded_hal_async::i2c::Operation<'b>], |
| 101 | ) -> Self::TransactionFuture<'a, 'b> { | 86 | ) -> Result<(), I2cDeviceError<BUS::Error>> { |
| 102 | let _ = address; | 87 | let _ = address; |
| 103 | let _ = operations; | 88 | let _ = operations; |
| 104 | async move { todo!() } | 89 | todo!() |
| 105 | } | 90 | } |
| 106 | } | 91 | } |
| 107 | 92 | ||
| @@ -136,55 +121,41 @@ where | |||
| 136 | M: RawMutex + 'static, | 121 | M: RawMutex + 'static, |
| 137 | BUS: i2c::I2c + SetConfig + 'static, | 122 | BUS: i2c::I2c + SetConfig + 'static, |
| 138 | { | 123 | { |
| 139 | type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; | 124 | async fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> { |
| 140 | 125 | let mut bus = self.bus.lock().await; | |
| 141 | fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> { | 126 | bus.set_config(&self.config); |
| 142 | async move { | 127 | bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?; |
| 143 | let mut bus = self.bus.lock().await; | 128 | Ok(()) |
| 144 | bus.set_config(&self.config); | ||
| 145 | bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?; | ||
| 146 | Ok(()) | ||
| 147 | } | ||
| 148 | } | 129 | } |
| 149 | 130 | ||
| 150 | type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; | 131 | async fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Result<(), I2cDeviceError<BUS::Error>> { |
| 151 | 132 | let mut bus = self.bus.lock().await; | |
| 152 | fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Self::WriteFuture<'a> { | 133 | bus.set_config(&self.config); |
| 153 | async move { | 134 | bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?; |
| 154 | let mut bus = self.bus.lock().await; | 135 | Ok(()) |
| 155 | bus.set_config(&self.config); | ||
| 156 | bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?; | ||
| 157 | Ok(()) | ||
| 158 | } | ||
| 159 | } | 136 | } |
| 160 | 137 | ||
| 161 | type WriteReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; | 138 | async fn write_read<'a>( |
| 162 | |||
| 163 | fn write_read<'a>( | ||
| 164 | &'a mut self, | 139 | &'a mut self, |
| 165 | address: u8, | 140 | address: u8, |
| 166 | wr_buffer: &'a [u8], | 141 | wr_buffer: &'a [u8], |
| 167 | rd_buffer: &'a mut [u8], | 142 | rd_buffer: &'a mut [u8], |
| 168 | ) -> Self::WriteReadFuture<'a> { | 143 | ) -> Result<(), I2cDeviceError<BUS::Error>> { |
| 169 | async move { | 144 | let mut bus = self.bus.lock().await; |
| 170 | let mut bus = self.bus.lock().await; | 145 | bus.set_config(&self.config); |
| 171 | bus.set_config(&self.config); | 146 | bus.write_read(address, wr_buffer, rd_buffer) |
| 172 | bus.write_read(address, wr_buffer, rd_buffer) | 147 | .await |
| 173 | .await | 148 | .map_err(I2cDeviceError::I2c)?; |
| 174 | .map_err(I2cDeviceError::I2c)?; | 149 | Ok(()) |
| 175 | Ok(()) | ||
| 176 | } | ||
| 177 | } | 150 | } |
| 178 | 151 | ||
| 179 | type TransactionFuture<'a, 'b> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a, 'b: 'a; | 152 | async fn transaction<'a, 'b>( |
| 180 | |||
| 181 | fn transaction<'a, 'b>( | ||
| 182 | &'a mut self, | 153 | &'a mut self, |
| 183 | address: u8, | 154 | address: u8, |
| 184 | operations: &'a mut [embedded_hal_async::i2c::Operation<'b>], | 155 | operations: &'a mut [embedded_hal_async::i2c::Operation<'b>], |
| 185 | ) -> Self::TransactionFuture<'a, 'b> { | 156 | ) -> Result<(), I2cDeviceError<BUS::Error>> { |
| 186 | let _ = address; | 157 | let _ = address; |
| 187 | let _ = operations; | 158 | let _ = operations; |
| 188 | async move { todo!() } | 159 | todo!() |
| 189 | } | 160 | } |
| 190 | } | 161 | } |
