diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-06-08 16:08:40 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-06-08 18:00:48 +0200 |
| commit | 921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 (patch) | |
| tree | bd21fba9800471b860ca44e05567588dcc1afef7 /embassy-nrf/src/buffered_uarte.rs | |
| parent | 87ad66f2b4a5bfd36dfc8d8aad5492e9e3f915e6 (diff) | |
Make interrupt module more standard.
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.
This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
- It works with `cortex-m` functions for manipulating interrupts, for example.
- It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
Diffstat (limited to 'embassy-nrf/src/buffered_uarte.rs')
| -rw-r--r-- | embassy-nrf/src/buffered_uarte.rs | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs index b4fe2d874..9bc1c1e7a 100644 --- a/embassy-nrf/src/buffered_uarte.rs +++ b/embassy-nrf/src/buffered_uarte.rs | |||
| @@ -15,7 +15,6 @@ use core::slice; | |||
| 15 | use core::sync::atomic::{compiler_fence, AtomicU8, AtomicUsize, Ordering}; | 15 | use core::sync::atomic::{compiler_fence, AtomicU8, AtomicUsize, Ordering}; |
| 16 | use core::task::Poll; | 16 | use core::task::Poll; |
| 17 | 17 | ||
| 18 | use embassy_cortex_m::interrupt::Interrupt; | ||
| 19 | use embassy_hal_common::atomic_ring_buffer::RingBuffer; | 18 | use embassy_hal_common::atomic_ring_buffer::RingBuffer; |
| 20 | use embassy_hal_common::{into_ref, PeripheralRef}; | 19 | use embassy_hal_common::{into_ref, PeripheralRef}; |
| 21 | use embassy_sync::waitqueue::AtomicWaker; | 20 | use embassy_sync::waitqueue::AtomicWaker; |
| @@ -24,13 +23,13 @@ pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Pari | |||
| 24 | 23 | ||
| 25 | use crate::gpio::sealed::Pin; | 24 | use crate::gpio::sealed::Pin; |
| 26 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; | 25 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; |
| 27 | use crate::interrupt::{self}; | 26 | use crate::interrupt::typelevel::Interrupt; |
| 28 | use crate::ppi::{ | 27 | use crate::ppi::{ |
| 29 | self, AnyConfigurableChannel, AnyGroup, Channel, ConfigurableChannel, Event, Group, Ppi, PpiGroup, Task, | 28 | self, AnyConfigurableChannel, AnyGroup, Channel, ConfigurableChannel, Event, Group, Ppi, PpiGroup, Task, |
| 30 | }; | 29 | }; |
| 31 | use crate::timer::{Instance as TimerInstance, Timer}; | 30 | use crate::timer::{Instance as TimerInstance, Timer}; |
| 32 | use crate::uarte::{apply_workaround_for_enable_anomaly, Config, Instance as UarteInstance}; | 31 | use crate::uarte::{apply_workaround_for_enable_anomaly, Config, Instance as UarteInstance}; |
| 33 | use crate::{pac, Peripheral}; | 32 | use crate::{interrupt, pac, Peripheral}; |
| 34 | 33 | ||
| 35 | mod sealed { | 34 | mod sealed { |
| 36 | use super::*; | 35 | use super::*; |
| @@ -77,7 +76,7 @@ pub struct InterruptHandler<U: UarteInstance> { | |||
| 77 | _phantom: PhantomData<U>, | 76 | _phantom: PhantomData<U>, |
| 78 | } | 77 | } |
| 79 | 78 | ||
| 80 | impl<U: UarteInstance> interrupt::Handler<U::Interrupt> for InterruptHandler<U> { | 79 | impl<U: UarteInstance> interrupt::typelevel::Handler<U::Interrupt> for InterruptHandler<U> { |
| 81 | unsafe fn on_interrupt() { | 80 | unsafe fn on_interrupt() { |
| 82 | //trace!("irq: start"); | 81 | //trace!("irq: start"); |
| 83 | let r = U::regs(); | 82 | let r = U::regs(); |
| @@ -202,7 +201,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { | |||
| 202 | ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd, | 201 | ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd, |
| 203 | ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd, | 202 | ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd, |
| 204 | ppi_group: impl Peripheral<P = impl Group> + 'd, | 203 | ppi_group: impl Peripheral<P = impl Group> + 'd, |
| 205 | _irq: impl interrupt::Binding<U::Interrupt, InterruptHandler<U>> + 'd, | 204 | _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd, |
| 206 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 205 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 207 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 206 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 208 | config: Config, | 207 | config: Config, |
| @@ -237,7 +236,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { | |||
| 237 | ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd, | 236 | ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd, |
| 238 | ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd, | 237 | ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd, |
| 239 | ppi_group: impl Peripheral<P = impl Group> + 'd, | 238 | ppi_group: impl Peripheral<P = impl Group> + 'd, |
| 240 | _irq: impl interrupt::Binding<U::Interrupt, InterruptHandler<U>> + 'd, | 239 | _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd, |
| 241 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 240 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 242 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 241 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 243 | cts: impl Peripheral<P = impl GpioPin> + 'd, | 242 | cts: impl Peripheral<P = impl GpioPin> + 'd, |
