diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-06-08 16:08:40 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-06-08 18:00:48 +0200 |
| commit | 921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 (patch) | |
| tree | bd21fba9800471b860ca44e05567588dcc1afef7 /embassy-nrf/src/chips | |
| parent | 87ad66f2b4a5bfd36dfc8d8aad5492e9e3f915e6 (diff) | |
Make interrupt module more standard.
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.
This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
- It works with `cortex-m` functions for manipulating interrupts, for example.
- It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
Diffstat (limited to 'embassy-nrf/src/chips')
| -rw-r--r-- | embassy-nrf/src/chips/nrf52805.rs | 56 | ||||
| -rw-r--r-- | embassy-nrf/src/chips/nrf52810.rs | 62 | ||||
| -rw-r--r-- | embassy-nrf/src/chips/nrf52811.rs | 62 | ||||
| -rw-r--r-- | embassy-nrf/src/chips/nrf52820.rs | 60 | ||||
| -rw-r--r-- | embassy-nrf/src/chips/nrf52832.rs | 82 | ||||
| -rw-r--r-- | embassy-nrf/src/chips/nrf52833.rs | 90 | ||||
| -rw-r--r-- | embassy-nrf/src/chips/nrf52840.rs | 94 | ||||
| -rw-r--r-- | embassy-nrf/src/chips/nrf5340_app.rs | 90 | ||||
| -rw-r--r-- | embassy-nrf/src/chips/nrf5340_net.rs | 48 | ||||
| -rw-r--r-- | embassy-nrf/src/chips/nrf9160.rs | 70 |
10 files changed, 337 insertions, 377 deletions
diff --git a/embassy-nrf/src/chips/nrf52805.rs b/embassy-nrf/src/chips/nrf52805.rs index e406c081b..8fbd760dc 100644 --- a/embassy-nrf/src/chips/nrf52805.rs +++ b/embassy-nrf/src/chips/nrf52805.rs | |||
| @@ -208,33 +208,29 @@ impl_ppi_channel!(PPI_CH31, 31 => static); | |||
| 208 | impl_saadc_input!(P0_04, ANALOG_INPUT2); | 208 | impl_saadc_input!(P0_04, ANALOG_INPUT2); |
| 209 | impl_saadc_input!(P0_05, ANALOG_INPUT3); | 209 | impl_saadc_input!(P0_05, ANALOG_INPUT3); |
| 210 | 210 | ||
| 211 | pub mod irqs { | 211 | embassy_cortex_m::interrupt_mod!( |
| 212 | use embassy_cortex_m::interrupt::_export::declare; | 212 | POWER_CLOCK, |
| 213 | 213 | RADIO, | |
| 214 | use crate::pac::Interrupt as InterruptEnum; | 214 | UARTE0_UART0, |
| 215 | 215 | TWIM0_TWIS0_TWI0, | |
| 216 | declare!(POWER_CLOCK); | 216 | SPIM0_SPIS0_SPI0, |
| 217 | declare!(RADIO); | 217 | GPIOTE, |
| 218 | declare!(UARTE0_UART0); | 218 | SAADC, |
| 219 | declare!(TWIM0_TWIS0_TWI0); | 219 | TIMER0, |
| 220 | declare!(SPIM0_SPIS0_SPI0); | 220 | TIMER1, |
| 221 | declare!(GPIOTE); | 221 | TIMER2, |
| 222 | declare!(SAADC); | 222 | RTC0, |
| 223 | declare!(TIMER0); | 223 | TEMP, |
| 224 | declare!(TIMER1); | 224 | RNG, |
| 225 | declare!(TIMER2); | 225 | ECB, |
| 226 | declare!(RTC0); | 226 | CCM_AAR, |
| 227 | declare!(TEMP); | 227 | WDT, |
| 228 | declare!(RNG); | 228 | RTC1, |
| 229 | declare!(ECB); | 229 | QDEC, |
| 230 | declare!(CCM_AAR); | 230 | SWI0_EGU0, |
| 231 | declare!(WDT); | 231 | SWI1_EGU1, |
| 232 | declare!(RTC1); | 232 | SWI2, |
| 233 | declare!(QDEC); | 233 | SWI3, |
| 234 | declare!(SWI0_EGU0); | 234 | SWI4, |
| 235 | declare!(SWI1_EGU1); | 235 | SWI5, |
| 236 | declare!(SWI2); | 236 | ); |
| 237 | declare!(SWI3); | ||
| 238 | declare!(SWI4); | ||
| 239 | declare!(SWI5); | ||
| 240 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52810.rs b/embassy-nrf/src/chips/nrf52810.rs index 153795e54..bbf8f7ccf 100644 --- a/embassy-nrf/src/chips/nrf52810.rs +++ b/embassy-nrf/src/chips/nrf52810.rs | |||
| @@ -234,36 +234,32 @@ impl_saadc_input!(P0_29, ANALOG_INPUT5); | |||
| 234 | impl_saadc_input!(P0_30, ANALOG_INPUT6); | 234 | impl_saadc_input!(P0_30, ANALOG_INPUT6); |
| 235 | impl_saadc_input!(P0_31, ANALOG_INPUT7); | 235 | impl_saadc_input!(P0_31, ANALOG_INPUT7); |
| 236 | 236 | ||
| 237 | pub mod irqs { | 237 | embassy_cortex_m::interrupt_mod!( |
| 238 | use embassy_cortex_m::interrupt::_export::declare; | 238 | POWER_CLOCK, |
| 239 | 239 | RADIO, | |
| 240 | use crate::pac::Interrupt as InterruptEnum; | 240 | UARTE0_UART0, |
| 241 | 241 | TWIM0_TWIS0_TWI0, | |
| 242 | declare!(POWER_CLOCK); | 242 | SPIM0_SPIS0_SPI0, |
| 243 | declare!(RADIO); | 243 | GPIOTE, |
| 244 | declare!(UARTE0_UART0); | 244 | SAADC, |
| 245 | declare!(TWIM0_TWIS0_TWI0); | 245 | TIMER0, |
| 246 | declare!(SPIM0_SPIS0_SPI0); | 246 | TIMER1, |
| 247 | declare!(GPIOTE); | 247 | TIMER2, |
| 248 | declare!(SAADC); | 248 | RTC0, |
| 249 | declare!(TIMER0); | 249 | TEMP, |
| 250 | declare!(TIMER1); | 250 | RNG, |
| 251 | declare!(TIMER2); | 251 | ECB, |
| 252 | declare!(RTC0); | 252 | CCM_AAR, |
| 253 | declare!(TEMP); | 253 | WDT, |
| 254 | declare!(RNG); | 254 | RTC1, |
| 255 | declare!(ECB); | 255 | QDEC, |
| 256 | declare!(CCM_AAR); | 256 | COMP, |
| 257 | declare!(WDT); | 257 | SWI0_EGU0, |
| 258 | declare!(RTC1); | 258 | SWI1_EGU1, |
| 259 | declare!(QDEC); | 259 | SWI2, |
| 260 | declare!(COMP); | 260 | SWI3, |
| 261 | declare!(SWI0_EGU0); | 261 | SWI4, |
| 262 | declare!(SWI1_EGU1); | 262 | SWI5, |
| 263 | declare!(SWI2); | 263 | PWM0, |
| 264 | declare!(SWI3); | 264 | PDM, |
| 265 | declare!(SWI4); | 265 | ); |
| 266 | declare!(SWI5); | ||
| 267 | declare!(PWM0); | ||
| 268 | declare!(PDM); | ||
| 269 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52811.rs b/embassy-nrf/src/chips/nrf52811.rs index a7a7cf58c..31a8dd6af 100644 --- a/embassy-nrf/src/chips/nrf52811.rs +++ b/embassy-nrf/src/chips/nrf52811.rs | |||
| @@ -236,36 +236,32 @@ impl_saadc_input!(P0_29, ANALOG_INPUT5); | |||
| 236 | impl_saadc_input!(P0_30, ANALOG_INPUT6); | 236 | impl_saadc_input!(P0_30, ANALOG_INPUT6); |
| 237 | impl_saadc_input!(P0_31, ANALOG_INPUT7); | 237 | impl_saadc_input!(P0_31, ANALOG_INPUT7); |
| 238 | 238 | ||
| 239 | pub mod irqs { | 239 | embassy_cortex_m::interrupt_mod!( |
| 240 | use embassy_cortex_m::interrupt::_export::declare; | 240 | POWER_CLOCK, |
| 241 | 241 | RADIO, | |
| 242 | use crate::pac::Interrupt as InterruptEnum; | 242 | UARTE0_UART0, |
| 243 | 243 | TWIM0_TWIS0_TWI0_SPIM0_SPIS0_SPI0, | |
| 244 | declare!(POWER_CLOCK); | 244 | SPIM1_SPIS1_SPI1, |
| 245 | declare!(RADIO); | 245 | GPIOTE, |
| 246 | declare!(UARTE0_UART0); | 246 | SAADC, |
| 247 | declare!(TWIM0_TWIS0_TWI0_SPIM0_SPIS0_SPI0); | 247 | TIMER0, |
| 248 | declare!(SPIM1_SPIS1_SPI1); | 248 | TIMER1, |
| 249 | declare!(GPIOTE); | 249 | TIMER2, |
| 250 | declare!(SAADC); | 250 | RTC0, |
| 251 | declare!(TIMER0); | 251 | TEMP, |
| 252 | declare!(TIMER1); | 252 | RNG, |
| 253 | declare!(TIMER2); | 253 | ECB, |
| 254 | declare!(RTC0); | 254 | CCM_AAR, |
| 255 | declare!(TEMP); | 255 | WDT, |
| 256 | declare!(RNG); | 256 | RTC1, |
| 257 | declare!(ECB); | 257 | QDEC, |
| 258 | declare!(CCM_AAR); | 258 | COMP, |
| 259 | declare!(WDT); | 259 | SWI0_EGU0, |
| 260 | declare!(RTC1); | 260 | SWI1_EGU1, |
| 261 | declare!(QDEC); | 261 | SWI2, |
| 262 | declare!(COMP); | 262 | SWI3, |
| 263 | declare!(SWI0_EGU0); | 263 | SWI4, |
| 264 | declare!(SWI1_EGU1); | 264 | SWI5, |
| 265 | declare!(SWI2); | 265 | PWM0, |
| 266 | declare!(SWI3); | 266 | PDM, |
| 267 | declare!(SWI4); | 267 | ); |
| 268 | declare!(SWI5); | ||
| 269 | declare!(PWM0); | ||
| 270 | declare!(PDM); | ||
| 271 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52820.rs b/embassy-nrf/src/chips/nrf52820.rs index 14a1b8cc9..6a6f4fcf2 100644 --- a/embassy-nrf/src/chips/nrf52820.rs +++ b/embassy-nrf/src/chips/nrf52820.rs | |||
| @@ -224,35 +224,31 @@ impl_ppi_channel!(PPI_CH29, 29 => static); | |||
| 224 | impl_ppi_channel!(PPI_CH30, 30 => static); | 224 | impl_ppi_channel!(PPI_CH30, 30 => static); |
| 225 | impl_ppi_channel!(PPI_CH31, 31 => static); | 225 | impl_ppi_channel!(PPI_CH31, 31 => static); |
| 226 | 226 | ||
| 227 | pub mod irqs { | 227 | embassy_cortex_m::interrupt_mod!( |
| 228 | use embassy_cortex_m::interrupt::_export::declare; | 228 | POWER_CLOCK, |
| 229 | 229 | RADIO, | |
| 230 | use crate::pac::Interrupt as InterruptEnum; | 230 | UARTE0_UART0, |
| 231 | 231 | SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0, | |
| 232 | declare!(POWER_CLOCK); | 232 | SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1, |
| 233 | declare!(RADIO); | 233 | GPIOTE, |
| 234 | declare!(UARTE0_UART0); | 234 | TIMER0, |
| 235 | declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); | 235 | TIMER1, |
| 236 | declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); | 236 | TIMER2, |
| 237 | declare!(GPIOTE); | 237 | RTC0, |
| 238 | declare!(TIMER0); | 238 | TEMP, |
| 239 | declare!(TIMER1); | 239 | RNG, |
| 240 | declare!(TIMER2); | 240 | ECB, |
| 241 | declare!(RTC0); | 241 | CCM_AAR, |
| 242 | declare!(TEMP); | 242 | WDT, |
| 243 | declare!(RNG); | 243 | RTC1, |
| 244 | declare!(ECB); | 244 | QDEC, |
| 245 | declare!(CCM_AAR); | 245 | COMP, |
| 246 | declare!(WDT); | 246 | SWI0_EGU0, |
| 247 | declare!(RTC1); | 247 | SWI1_EGU1, |
| 248 | declare!(QDEC); | 248 | SWI2_EGU2, |
| 249 | declare!(COMP); | 249 | SWI3_EGU3, |
| 250 | declare!(SWI0_EGU0); | 250 | SWI4_EGU4, |
| 251 | declare!(SWI1_EGU1); | 251 | SWI5_EGU5, |
| 252 | declare!(SWI2_EGU2); | 252 | TIMER3, |
| 253 | declare!(SWI3_EGU3); | 253 | USBD, |
| 254 | declare!(SWI4_EGU4); | 254 | ); |
| 255 | declare!(SWI5_EGU5); | ||
| 256 | declare!(TIMER3); | ||
| 257 | declare!(USBD); | ||
| 258 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52832.rs b/embassy-nrf/src/chips/nrf52832.rs index 83ecd0deb..e43b3d5b2 100644 --- a/embassy-nrf/src/chips/nrf52832.rs +++ b/embassy-nrf/src/chips/nrf52832.rs | |||
| @@ -263,46 +263,42 @@ impl_saadc_input!(P0_31, ANALOG_INPUT7); | |||
| 263 | 263 | ||
| 264 | impl_i2s!(I2S, I2S, I2S); | 264 | impl_i2s!(I2S, I2S, I2S); |
| 265 | 265 | ||
| 266 | pub mod irqs { | 266 | embassy_cortex_m::interrupt_mod!( |
| 267 | use embassy_cortex_m::interrupt::_export::declare; | 267 | POWER_CLOCK, |
| 268 | 268 | RADIO, | |
| 269 | use crate::pac::Interrupt as InterruptEnum; | 269 | UARTE0_UART0, |
| 270 | 270 | SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0, | |
| 271 | declare!(POWER_CLOCK); | 271 | SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1, |
| 272 | declare!(RADIO); | 272 | NFCT, |
| 273 | declare!(UARTE0_UART0); | 273 | GPIOTE, |
| 274 | declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); | 274 | SAADC, |
| 275 | declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); | 275 | TIMER0, |
| 276 | declare!(NFCT); | 276 | TIMER1, |
| 277 | declare!(GPIOTE); | 277 | TIMER2, |
| 278 | declare!(SAADC); | 278 | RTC0, |
| 279 | declare!(TIMER0); | 279 | TEMP, |
| 280 | declare!(TIMER1); | 280 | RNG, |
| 281 | declare!(TIMER2); | 281 | ECB, |
| 282 | declare!(RTC0); | 282 | CCM_AAR, |
| 283 | declare!(TEMP); | 283 | WDT, |
| 284 | declare!(RNG); | 284 | RTC1, |
| 285 | declare!(ECB); | 285 | QDEC, |
| 286 | declare!(CCM_AAR); | 286 | COMP_LPCOMP, |
| 287 | declare!(WDT); | 287 | SWI0_EGU0, |
| 288 | declare!(RTC1); | 288 | SWI1_EGU1, |
| 289 | declare!(QDEC); | 289 | SWI2_EGU2, |
| 290 | declare!(COMP_LPCOMP); | 290 | SWI3_EGU3, |
| 291 | declare!(SWI0_EGU0); | 291 | SWI4_EGU4, |
| 292 | declare!(SWI1_EGU1); | 292 | SWI5_EGU5, |
| 293 | declare!(SWI2_EGU2); | 293 | TIMER3, |
| 294 | declare!(SWI3_EGU3); | 294 | TIMER4, |
| 295 | declare!(SWI4_EGU4); | 295 | PWM0, |
| 296 | declare!(SWI5_EGU5); | 296 | PDM, |
| 297 | declare!(TIMER3); | 297 | MWU, |
| 298 | declare!(TIMER4); | 298 | PWM1, |
| 299 | declare!(PWM0); | 299 | PWM2, |
| 300 | declare!(PDM); | 300 | SPIM2_SPIS2_SPI2, |
| 301 | declare!(MWU); | 301 | RTC2, |
| 302 | declare!(PWM1); | 302 | FPU, |
| 303 | declare!(PWM2); | 303 | I2S, |
| 304 | declare!(SPIM2_SPIS2_SPI2); | 304 | ); |
| 305 | declare!(RTC2); | ||
| 306 | declare!(FPU); | ||
| 307 | declare!(I2S); | ||
| 308 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52833.rs b/embassy-nrf/src/chips/nrf52833.rs index 5e5db04de..d95e3497c 100644 --- a/embassy-nrf/src/chips/nrf52833.rs +++ b/embassy-nrf/src/chips/nrf52833.rs | |||
| @@ -306,50 +306,46 @@ impl_saadc_input!(P0_31, ANALOG_INPUT7); | |||
| 306 | 306 | ||
| 307 | impl_i2s!(I2S, I2S, I2S); | 307 | impl_i2s!(I2S, I2S, I2S); |
| 308 | 308 | ||
| 309 | pub mod irqs { | 309 | embassy_cortex_m::interrupt_mod!( |
| 310 | use embassy_cortex_m::interrupt::_export::declare; | 310 | POWER_CLOCK, |
| 311 | 311 | RADIO, | |
| 312 | use crate::pac::Interrupt as InterruptEnum; | 312 | UARTE0_UART0, |
| 313 | 313 | SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0, | |
| 314 | declare!(POWER_CLOCK); | 314 | SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1, |
| 315 | declare!(RADIO); | 315 | NFCT, |
| 316 | declare!(UARTE0_UART0); | 316 | GPIOTE, |
| 317 | declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); | 317 | SAADC, |
| 318 | declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); | 318 | TIMER0, |
| 319 | declare!(NFCT); | 319 | TIMER1, |
| 320 | declare!(GPIOTE); | 320 | TIMER2, |
| 321 | declare!(SAADC); | 321 | RTC0, |
| 322 | declare!(TIMER0); | 322 | TEMP, |
| 323 | declare!(TIMER1); | 323 | RNG, |
| 324 | declare!(TIMER2); | 324 | ECB, |
| 325 | declare!(RTC0); | 325 | CCM_AAR, |
| 326 | declare!(TEMP); | 326 | WDT, |
| 327 | declare!(RNG); | 327 | RTC1, |
| 328 | declare!(ECB); | 328 | QDEC, |
| 329 | declare!(CCM_AAR); | 329 | COMP_LPCOMP, |
| 330 | declare!(WDT); | 330 | SWI0_EGU0, |
| 331 | declare!(RTC1); | 331 | SWI1_EGU1, |
| 332 | declare!(QDEC); | 332 | SWI2_EGU2, |
| 333 | declare!(COMP_LPCOMP); | 333 | SWI3_EGU3, |
| 334 | declare!(SWI0_EGU0); | 334 | SWI4_EGU4, |
| 335 | declare!(SWI1_EGU1); | 335 | SWI5_EGU5, |
| 336 | declare!(SWI2_EGU2); | 336 | TIMER3, |
| 337 | declare!(SWI3_EGU3); | 337 | TIMER4, |
| 338 | declare!(SWI4_EGU4); | 338 | PWM0, |
| 339 | declare!(SWI5_EGU5); | 339 | PDM, |
| 340 | declare!(TIMER3); | 340 | MWU, |
| 341 | declare!(TIMER4); | 341 | PWM1, |
| 342 | declare!(PWM0); | 342 | PWM2, |
| 343 | declare!(PDM); | 343 | SPIM2_SPIS2_SPI2, |
| 344 | declare!(MWU); | 344 | RTC2, |
| 345 | declare!(PWM1); | 345 | FPU, |
| 346 | declare!(PWM2); | 346 | USBD, |
| 347 | declare!(SPIM2_SPIS2_SPI2); | 347 | UARTE1, |
| 348 | declare!(RTC2); | 348 | PWM3, |
| 349 | declare!(FPU); | 349 | SPIM3, |
| 350 | declare!(USBD); | 350 | I2S, |
| 351 | declare!(UARTE1); | 351 | ); |
| 352 | declare!(PWM3); | ||
| 353 | declare!(SPIM3); | ||
| 354 | declare!(I2S); | ||
| 355 | } | ||
diff --git a/embassy-nrf/src/chips/nrf52840.rs b/embassy-nrf/src/chips/nrf52840.rs index f6d33f85c..0094b1220 100644 --- a/embassy-nrf/src/chips/nrf52840.rs +++ b/embassy-nrf/src/chips/nrf52840.rs | |||
| @@ -311,52 +311,48 @@ impl_saadc_input!(P0_31, ANALOG_INPUT7); | |||
| 311 | 311 | ||
| 312 | impl_i2s!(I2S, I2S, I2S); | 312 | impl_i2s!(I2S, I2S, I2S); |
| 313 | 313 | ||
| 314 | pub mod irqs { | 314 | embassy_cortex_m::interrupt_mod!( |
| 315 | use embassy_cortex_m::interrupt::_export::declare; | 315 | POWER_CLOCK, |
| 316 | 316 | RADIO, | |
| 317 | use crate::pac::Interrupt as InterruptEnum; | 317 | UARTE0_UART0, |
| 318 | 318 | SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0, | |
| 319 | declare!(POWER_CLOCK); | 319 | SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1, |
| 320 | declare!(RADIO); | 320 | NFCT, |
| 321 | declare!(UARTE0_UART0); | 321 | GPIOTE, |
| 322 | declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); | 322 | SAADC, |
| 323 | declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); | 323 | TIMER0, |
| 324 | declare!(NFCT); | 324 | TIMER1, |
| 325 | declare!(GPIOTE); | 325 | TIMER2, |
| 326 | declare!(SAADC); | 326 | RTC0, |
| 327 | declare!(TIMER0); | 327 | TEMP, |
| 328 | declare!(TIMER1); | 328 | RNG, |
| 329 | declare!(TIMER2); | 329 | ECB, |
| 330 | declare!(RTC0); | 330 | CCM_AAR, |
| 331 | declare!(TEMP); | 331 | WDT, |
| 332 | declare!(RNG); | 332 | RTC1, |
| 333 | declare!(ECB); | 333 | QDEC, |
| 334 | declare!(CCM_AAR); | 334 | COMP_LPCOMP, |
| 335 | declare!(WDT); | 335 | SWI0_EGU0, |
| 336 | declare!(RTC1); | 336 | SWI1_EGU1, |
| 337 | declare!(QDEC); | 337 | SWI2_EGU2, |
| 338 | declare!(COMP_LPCOMP); | 338 | SWI3_EGU3, |
| 339 | declare!(SWI0_EGU0); | 339 | SWI4_EGU4, |
| 340 | declare!(SWI1_EGU1); | 340 | SWI5_EGU5, |
| 341 | declare!(SWI2_EGU2); | 341 | TIMER3, |
| 342 | declare!(SWI3_EGU3); | 342 | TIMER4, |
| 343 | declare!(SWI4_EGU4); | 343 | PWM0, |
| 344 | declare!(SWI5_EGU5); | 344 | PDM, |
| 345 | declare!(TIMER3); | 345 | MWU, |
| 346 | declare!(TIMER4); | 346 | PWM1, |
| 347 | declare!(PWM0); | 347 | PWM2, |
| 348 | declare!(PDM); | 348 | SPIM2_SPIS2_SPI2, |
| 349 | declare!(MWU); | 349 | RTC2, |
| 350 | declare!(PWM1); | 350 | FPU, |
| 351 | declare!(PWM2); | 351 | USBD, |
| 352 | declare!(SPIM2_SPIS2_SPI2); | 352 | UARTE1, |
| 353 | declare!(RTC2); | 353 | QSPI, |
| 354 | declare!(FPU); | 354 | CRYPTOCELL, |
| 355 | declare!(USBD); | 355 | PWM3, |
| 356 | declare!(UARTE1); | 356 | SPIM3, |
| 357 | declare!(QSPI); | 357 | I2S, |
| 358 | declare!(CRYPTOCELL); | 358 | ); |
| 359 | declare!(PWM3); | ||
| 360 | declare!(SPIM3); | ||
| 361 | declare!(I2S); | ||
| 362 | } | ||
diff --git a/embassy-nrf/src/chips/nrf5340_app.rs b/embassy-nrf/src/chips/nrf5340_app.rs index 34f96800f..c10520051 100644 --- a/embassy-nrf/src/chips/nrf5340_app.rs +++ b/embassy-nrf/src/chips/nrf5340_app.rs | |||
| @@ -504,50 +504,46 @@ impl_saadc_input!(P0_18, ANALOG_INPUT5); | |||
| 504 | impl_saadc_input!(P0_19, ANALOG_INPUT6); | 504 | impl_saadc_input!(P0_19, ANALOG_INPUT6); |
| 505 | impl_saadc_input!(P0_20, ANALOG_INPUT7); | 505 | impl_saadc_input!(P0_20, ANALOG_INPUT7); |
| 506 | 506 | ||
| 507 | pub mod irqs { | 507 | embassy_cortex_m::interrupt_mod!( |
| 508 | use embassy_cortex_m::interrupt::_export::declare; | 508 | FPU, |
| 509 | 509 | CACHE, | |
| 510 | use crate::pac::Interrupt as InterruptEnum; | 510 | SPU, |
| 511 | 511 | CLOCK_POWER, | |
| 512 | declare!(FPU); | 512 | SERIAL0, |
| 513 | declare!(CACHE); | 513 | SERIAL1, |
| 514 | declare!(SPU); | 514 | SPIM4, |
| 515 | declare!(CLOCK_POWER); | 515 | SERIAL2, |
| 516 | declare!(SERIAL0); | 516 | SERIAL3, |
| 517 | declare!(SERIAL1); | 517 | GPIOTE0, |
| 518 | declare!(SPIM4); | 518 | SAADC, |
| 519 | declare!(SERIAL2); | 519 | TIMER0, |
| 520 | declare!(SERIAL3); | 520 | TIMER1, |
| 521 | declare!(GPIOTE0); | 521 | TIMER2, |
| 522 | declare!(SAADC); | 522 | RTC0, |
| 523 | declare!(TIMER0); | 523 | RTC1, |
| 524 | declare!(TIMER1); | 524 | WDT0, |
| 525 | declare!(TIMER2); | 525 | WDT1, |
| 526 | declare!(RTC0); | 526 | COMP_LPCOMP, |
| 527 | declare!(RTC1); | 527 | EGU0, |
| 528 | declare!(WDT0); | 528 | EGU1, |
| 529 | declare!(WDT1); | 529 | EGU2, |
| 530 | declare!(COMP_LPCOMP); | 530 | EGU3, |
| 531 | declare!(EGU0); | 531 | EGU4, |
| 532 | declare!(EGU1); | 532 | EGU5, |
| 533 | declare!(EGU2); | 533 | PWM0, |
| 534 | declare!(EGU3); | 534 | PWM1, |
| 535 | declare!(EGU4); | 535 | PWM2, |
| 536 | declare!(EGU5); | 536 | PWM3, |
| 537 | declare!(PWM0); | 537 | PDM0, |
| 538 | declare!(PWM1); | 538 | I2S0, |
| 539 | declare!(PWM2); | 539 | IPC, |
| 540 | declare!(PWM3); | 540 | QSPI, |
| 541 | declare!(PDM0); | 541 | NFCT, |
| 542 | declare!(I2S0); | 542 | GPIOTE1, |
| 543 | declare!(IPC); | 543 | QDEC0, |
| 544 | declare!(QSPI); | 544 | QDEC1, |
| 545 | declare!(NFCT); | 545 | USBD, |
| 546 | declare!(GPIOTE1); | 546 | USBREGULATOR, |
| 547 | declare!(QDEC0); | 547 | KMU, |
| 548 | declare!(QDEC1); | 548 | CRYPTOCELL, |
| 549 | declare!(USBD); | 549 | ); |
| 550 | declare!(USBREGULATOR); | ||
| 551 | declare!(KMU); | ||
| 552 | declare!(CRYPTOCELL); | ||
| 553 | } | ||
diff --git a/embassy-nrf/src/chips/nrf5340_net.rs b/embassy-nrf/src/chips/nrf5340_net.rs index 1e59528cb..a6fb1d4cc 100644 --- a/embassy-nrf/src/chips/nrf5340_net.rs +++ b/embassy-nrf/src/chips/nrf5340_net.rs | |||
| @@ -340,29 +340,25 @@ impl_ppi_channel!(PPI_CH29, 29 => configurable); | |||
| 340 | impl_ppi_channel!(PPI_CH30, 30 => configurable); | 340 | impl_ppi_channel!(PPI_CH30, 30 => configurable); |
| 341 | impl_ppi_channel!(PPI_CH31, 31 => configurable); | 341 | impl_ppi_channel!(PPI_CH31, 31 => configurable); |
| 342 | 342 | ||
| 343 | pub mod irqs { | 343 | embassy_cortex_m::interrupt_mod!( |
| 344 | use embassy_cortex_m::interrupt::_export::declare; | 344 | CLOCK_POWER, |
| 345 | 345 | RADIO, | |
| 346 | use crate::pac::Interrupt as InterruptEnum; | 346 | RNG, |
| 347 | 347 | GPIOTE, | |
| 348 | declare!(CLOCK_POWER); | 348 | WDT, |
| 349 | declare!(RADIO); | 349 | TIMER0, |
| 350 | declare!(RNG); | 350 | ECB, |
| 351 | declare!(GPIOTE); | 351 | AAR_CCM, |
| 352 | declare!(WDT); | 352 | TEMP, |
| 353 | declare!(TIMER0); | 353 | RTC0, |
| 354 | declare!(ECB); | 354 | IPC, |
| 355 | declare!(AAR_CCM); | 355 | SERIAL0, |
| 356 | declare!(TEMP); | 356 | EGU0, |
| 357 | declare!(RTC0); | 357 | RTC1, |
| 358 | declare!(IPC); | 358 | TIMER1, |
| 359 | declare!(SERIAL0); | 359 | TIMER2, |
| 360 | declare!(EGU0); | 360 | SWI0, |
| 361 | declare!(RTC1); | 361 | SWI1, |
| 362 | declare!(TIMER1); | 362 | SWI2, |
| 363 | declare!(TIMER2); | 363 | SWI3, |
| 364 | declare!(SWI0); | 364 | ); |
| 365 | declare!(SWI1); | ||
| 366 | declare!(SWI2); | ||
| 367 | declare!(SWI3); | ||
| 368 | } | ||
diff --git a/embassy-nrf/src/chips/nrf9160.rs b/embassy-nrf/src/chips/nrf9160.rs index d2b45114f..b6ae78bbe 100644 --- a/embassy-nrf/src/chips/nrf9160.rs +++ b/embassy-nrf/src/chips/nrf9160.rs | |||
| @@ -366,40 +366,36 @@ impl_saadc_input!(P0_18, ANALOG_INPUT5); | |||
| 366 | impl_saadc_input!(P0_19, ANALOG_INPUT6); | 366 | impl_saadc_input!(P0_19, ANALOG_INPUT6); |
| 367 | impl_saadc_input!(P0_20, ANALOG_INPUT7); | 367 | impl_saadc_input!(P0_20, ANALOG_INPUT7); |
| 368 | 368 | ||
| 369 | pub mod irqs { | 369 | embassy_cortex_m::interrupt_mod!( |
| 370 | use embassy_cortex_m::interrupt::_export::declare; | 370 | SPU, |
| 371 | 371 | CLOCK_POWER, | |
| 372 | use crate::pac::Interrupt as InterruptEnum; | 372 | UARTE0_SPIM0_SPIS0_TWIM0_TWIS0, |
| 373 | 373 | UARTE1_SPIM1_SPIS1_TWIM1_TWIS1, | |
| 374 | declare!(SPU); | 374 | UARTE2_SPIM2_SPIS2_TWIM2_TWIS2, |
| 375 | declare!(CLOCK_POWER); | 375 | UARTE3_SPIM3_SPIS3_TWIM3_TWIS3, |
| 376 | declare!(UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); | 376 | GPIOTE0, |
| 377 | declare!(UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); | 377 | SAADC, |
| 378 | declare!(UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); | 378 | TIMER0, |
| 379 | declare!(UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); | 379 | TIMER1, |
| 380 | declare!(GPIOTE0); | 380 | TIMER2, |
| 381 | declare!(SAADC); | 381 | RTC0, |
| 382 | declare!(TIMER0); | 382 | RTC1, |
| 383 | declare!(TIMER1); | 383 | WDT, |
| 384 | declare!(TIMER2); | 384 | EGU0, |
| 385 | declare!(RTC0); | 385 | EGU1, |
| 386 | declare!(RTC1); | 386 | EGU2, |
| 387 | declare!(WDT); | 387 | EGU3, |
| 388 | declare!(EGU0); | 388 | EGU4, |
| 389 | declare!(EGU1); | 389 | EGU5, |
| 390 | declare!(EGU2); | 390 | PWM0, |
| 391 | declare!(EGU3); | 391 | PWM1, |
| 392 | declare!(EGU4); | 392 | PWM2, |
| 393 | declare!(EGU5); | 393 | PDM, |
| 394 | declare!(PWM0); | 394 | PWM3, |
| 395 | declare!(PWM1); | 395 | I2S, |
| 396 | declare!(PWM2); | 396 | IPC, |
| 397 | declare!(PDM); | 397 | FPU, |
| 398 | declare!(PWM3); | 398 | GPIOTE1, |
| 399 | declare!(I2S); | 399 | KMU, |
| 400 | declare!(IPC); | 400 | CRYPTOCELL, |
| 401 | declare!(FPU); | 401 | ); |
| 402 | declare!(GPIOTE1); | ||
| 403 | declare!(KMU); | ||
| 404 | declare!(CRYPTOCELL); | ||
| 405 | } | ||
