diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-06-08 16:08:40 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-06-08 18:00:48 +0200 |
| commit | 921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 (patch) | |
| tree | bd21fba9800471b860ca44e05567588dcc1afef7 /embassy-nrf/src/spim.rs | |
| parent | 87ad66f2b4a5bfd36dfc8d8aad5492e9e3f915e6 (diff) | |
Make interrupt module more standard.
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.
This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
- It works with `cortex-m` functions for manipulating interrupts, for example.
- It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
Diffstat (limited to 'embassy-nrf/src/spim.rs')
| -rw-r--r-- | embassy-nrf/src/spim.rs | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs index bb9cda323..66bbd1a8f 100644 --- a/embassy-nrf/src/spim.rs +++ b/embassy-nrf/src/spim.rs | |||
| @@ -15,9 +15,9 @@ pub use pac::spim0::frequency::FREQUENCY_A as Frequency; | |||
| 15 | use crate::chip::FORCE_COPY_BUFFER_SIZE; | 15 | use crate::chip::FORCE_COPY_BUFFER_SIZE; |
| 16 | use crate::gpio::sealed::Pin as _; | 16 | use crate::gpio::sealed::Pin as _; |
| 17 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; | 17 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; |
| 18 | use crate::interrupt::{self, Interrupt}; | 18 | use crate::interrupt::typelevel::Interrupt; |
| 19 | use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; | 19 | use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; |
| 20 | use crate::{pac, Peripheral}; | 20 | use crate::{interrupt, pac, Peripheral}; |
| 21 | 21 | ||
| 22 | /// SPIM error | 22 | /// SPIM error |
| 23 | #[derive(Debug, Clone, Copy, PartialEq, Eq)] | 23 | #[derive(Debug, Clone, Copy, PartialEq, Eq)] |
| @@ -63,7 +63,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 63 | _phantom: PhantomData<T>, | 63 | _phantom: PhantomData<T>, |
| 64 | } | 64 | } |
| 65 | 65 | ||
| 66 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 66 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 67 | unsafe fn on_interrupt() { | 67 | unsafe fn on_interrupt() { |
| 68 | let r = T::regs(); | 68 | let r = T::regs(); |
| 69 | let s = T::state(); | 69 | let s = T::state(); |
| @@ -84,7 +84,7 @@ impl<'d, T: Instance> Spim<'d, T> { | |||
| 84 | /// Create a new SPIM driver. | 84 | /// Create a new SPIM driver. |
| 85 | pub fn new( | 85 | pub fn new( |
| 86 | spim: impl Peripheral<P = T> + 'd, | 86 | spim: impl Peripheral<P = T> + 'd, |
| 87 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 87 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 88 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 88 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 89 | miso: impl Peripheral<P = impl GpioPin> + 'd, | 89 | miso: impl Peripheral<P = impl GpioPin> + 'd, |
| 90 | mosi: impl Peripheral<P = impl GpioPin> + 'd, | 90 | mosi: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -103,7 +103,7 @@ impl<'d, T: Instance> Spim<'d, T> { | |||
| 103 | /// Create a new SPIM driver, capable of TX only (MOSI only). | 103 | /// Create a new SPIM driver, capable of TX only (MOSI only). |
| 104 | pub fn new_txonly( | 104 | pub fn new_txonly( |
| 105 | spim: impl Peripheral<P = T> + 'd, | 105 | spim: impl Peripheral<P = T> + 'd, |
| 106 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 106 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 107 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 107 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 108 | mosi: impl Peripheral<P = impl GpioPin> + 'd, | 108 | mosi: impl Peripheral<P = impl GpioPin> + 'd, |
| 109 | config: Config, | 109 | config: Config, |
| @@ -115,7 +115,7 @@ impl<'d, T: Instance> Spim<'d, T> { | |||
| 115 | /// Create a new SPIM driver, capable of RX only (MISO only). | 115 | /// Create a new SPIM driver, capable of RX only (MISO only). |
| 116 | pub fn new_rxonly( | 116 | pub fn new_rxonly( |
| 117 | spim: impl Peripheral<P = T> + 'd, | 117 | spim: impl Peripheral<P = T> + 'd, |
| 118 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 118 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 119 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 119 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 120 | miso: impl Peripheral<P = impl GpioPin> + 'd, | 120 | miso: impl Peripheral<P = impl GpioPin> + 'd, |
| 121 | config: Config, | 121 | config: Config, |
| @@ -408,7 +408,7 @@ pub(crate) mod sealed { | |||
| 408 | /// SPIM peripheral instance | 408 | /// SPIM peripheral instance |
| 409 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { | 409 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { |
| 410 | /// Interrupt for this peripheral. | 410 | /// Interrupt for this peripheral. |
| 411 | type Interrupt: Interrupt; | 411 | type Interrupt: interrupt::typelevel::Interrupt; |
| 412 | } | 412 | } |
| 413 | 413 | ||
| 414 | macro_rules! impl_spim { | 414 | macro_rules! impl_spim { |
| @@ -423,7 +423,7 @@ macro_rules! impl_spim { | |||
| 423 | } | 423 | } |
| 424 | } | 424 | } |
| 425 | impl crate::spim::Instance for peripherals::$type { | 425 | impl crate::spim::Instance for peripherals::$type { |
| 426 | type Interrupt = crate::interrupt::$irq; | 426 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 427 | } | 427 | } |
| 428 | }; | 428 | }; |
| 429 | } | 429 | } |
