diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-06-08 16:08:40 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-06-08 18:00:48 +0200 |
| commit | 921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 (patch) | |
| tree | bd21fba9800471b860ca44e05567588dcc1afef7 /embassy-nrf/src/spis.rs | |
| parent | 87ad66f2b4a5bfd36dfc8d8aad5492e9e3f915e6 (diff) | |
Make interrupt module more standard.
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.
This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
- It works with `cortex-m` functions for manipulating interrupts, for example.
- It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
Diffstat (limited to 'embassy-nrf/src/spis.rs')
| -rw-r--r-- | embassy-nrf/src/spis.rs | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/embassy-nrf/src/spis.rs b/embassy-nrf/src/spis.rs index a1d6803ed..aa438415a 100644 --- a/embassy-nrf/src/spis.rs +++ b/embassy-nrf/src/spis.rs | |||
| @@ -13,9 +13,9 @@ pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MO | |||
| 13 | use crate::chip::FORCE_COPY_BUFFER_SIZE; | 13 | use crate::chip::FORCE_COPY_BUFFER_SIZE; |
| 14 | use crate::gpio::sealed::Pin as _; | 14 | use crate::gpio::sealed::Pin as _; |
| 15 | use crate::gpio::{self, AnyPin, Pin as GpioPin}; | 15 | use crate::gpio::{self, AnyPin, Pin as GpioPin}; |
| 16 | use crate::interrupt::{self, Interrupt}; | 16 | use crate::interrupt::typelevel::Interrupt; |
| 17 | use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; | 17 | use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; |
| 18 | use crate::{pac, Peripheral}; | 18 | use crate::{interrupt, pac, Peripheral}; |
| 19 | 19 | ||
| 20 | /// SPIS error | 20 | /// SPIS error |
| 21 | #[derive(Debug, Clone, Copy, PartialEq, Eq)] | 21 | #[derive(Debug, Clone, Copy, PartialEq, Eq)] |
| @@ -68,7 +68,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 68 | _phantom: PhantomData<T>, | 68 | _phantom: PhantomData<T>, |
| 69 | } | 69 | } |
| 70 | 70 | ||
| 71 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 71 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 72 | unsafe fn on_interrupt() { | 72 | unsafe fn on_interrupt() { |
| 73 | let r = T::regs(); | 73 | let r = T::regs(); |
| 74 | let s = T::state(); | 74 | let s = T::state(); |
| @@ -94,7 +94,7 @@ impl<'d, T: Instance> Spis<'d, T> { | |||
| 94 | /// Create a new SPIS driver. | 94 | /// Create a new SPIS driver. |
| 95 | pub fn new( | 95 | pub fn new( |
| 96 | spis: impl Peripheral<P = T> + 'd, | 96 | spis: impl Peripheral<P = T> + 'd, |
| 97 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 97 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 98 | cs: impl Peripheral<P = impl GpioPin> + 'd, | 98 | cs: impl Peripheral<P = impl GpioPin> + 'd, |
| 99 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 99 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 100 | miso: impl Peripheral<P = impl GpioPin> + 'd, | 100 | miso: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -115,7 +115,7 @@ impl<'d, T: Instance> Spis<'d, T> { | |||
| 115 | /// Create a new SPIS driver, capable of TX only (MISO only). | 115 | /// Create a new SPIS driver, capable of TX only (MISO only). |
| 116 | pub fn new_txonly( | 116 | pub fn new_txonly( |
| 117 | spis: impl Peripheral<P = T> + 'd, | 117 | spis: impl Peripheral<P = T> + 'd, |
| 118 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 118 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 119 | cs: impl Peripheral<P = impl GpioPin> + 'd, | 119 | cs: impl Peripheral<P = impl GpioPin> + 'd, |
| 120 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 120 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 121 | miso: impl Peripheral<P = impl GpioPin> + 'd, | 121 | miso: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -128,7 +128,7 @@ impl<'d, T: Instance> Spis<'d, T> { | |||
| 128 | /// Create a new SPIS driver, capable of RX only (MOSI only). | 128 | /// Create a new SPIS driver, capable of RX only (MOSI only). |
| 129 | pub fn new_rxonly( | 129 | pub fn new_rxonly( |
| 130 | spis: impl Peripheral<P = T> + 'd, | 130 | spis: impl Peripheral<P = T> + 'd, |
| 131 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 131 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 132 | cs: impl Peripheral<P = impl GpioPin> + 'd, | 132 | cs: impl Peripheral<P = impl GpioPin> + 'd, |
| 133 | sck: impl Peripheral<P = impl GpioPin> + 'd, | 133 | sck: impl Peripheral<P = impl GpioPin> + 'd, |
| 134 | mosi: impl Peripheral<P = impl GpioPin> + 'd, | 134 | mosi: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -480,7 +480,7 @@ pub(crate) mod sealed { | |||
| 480 | /// SPIS peripheral instance | 480 | /// SPIS peripheral instance |
| 481 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { | 481 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { |
| 482 | /// Interrupt for this peripheral. | 482 | /// Interrupt for this peripheral. |
| 483 | type Interrupt: Interrupt; | 483 | type Interrupt: interrupt::typelevel::Interrupt; |
| 484 | } | 484 | } |
| 485 | 485 | ||
| 486 | macro_rules! impl_spis { | 486 | macro_rules! impl_spis { |
| @@ -495,7 +495,7 @@ macro_rules! impl_spis { | |||
| 495 | } | 495 | } |
| 496 | } | 496 | } |
| 497 | impl crate::spis::Instance for peripherals::$type { | 497 | impl crate::spis::Instance for peripherals::$type { |
| 498 | type Interrupt = crate::interrupt::$irq; | 498 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 499 | } | 499 | } |
| 500 | }; | 500 | }; |
| 501 | } | 501 | } |
