diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-06-08 16:08:40 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-06-08 18:00:48 +0200 |
| commit | 921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 (patch) | |
| tree | bd21fba9800471b860ca44e05567588dcc1afef7 /embassy-nrf/src/uarte.rs | |
| parent | 87ad66f2b4a5bfd36dfc8d8aad5492e9e3f915e6 (diff) | |
Make interrupt module more standard.
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.
This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
- It works with `cortex-m` functions for manipulating interrupts, for example.
- It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
Diffstat (limited to 'embassy-nrf/src/uarte.rs')
| -rw-r--r-- | embassy-nrf/src/uarte.rs | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs index 6c6941ee8..85a951ae0 100644 --- a/embassy-nrf/src/uarte.rs +++ b/embassy-nrf/src/uarte.rs | |||
| @@ -27,11 +27,11 @@ pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Pari | |||
| 27 | use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; | 27 | use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; |
| 28 | use crate::gpio::sealed::Pin as _; | 28 | use crate::gpio::sealed::Pin as _; |
| 29 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; | 29 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; |
| 30 | use crate::interrupt::{self, Interrupt}; | 30 | use crate::interrupt::typelevel::Interrupt; |
| 31 | use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task}; | 31 | use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task}; |
| 32 | use crate::timer::{Frequency, Instance as TimerInstance, Timer}; | 32 | use crate::timer::{Frequency, Instance as TimerInstance, Timer}; |
| 33 | use crate::util::slice_in_ram_or; | 33 | use crate::util::slice_in_ram_or; |
| 34 | use crate::{pac, Peripheral}; | 34 | use crate::{interrupt, pac, Peripheral}; |
| 35 | 35 | ||
| 36 | /// UARTE config. | 36 | /// UARTE config. |
| 37 | #[derive(Clone)] | 37 | #[derive(Clone)] |
| @@ -68,7 +68,7 @@ pub struct InterruptHandler<T: Instance> { | |||
| 68 | _phantom: PhantomData<T>, | 68 | _phantom: PhantomData<T>, |
| 69 | } | 69 | } |
| 70 | 70 | ||
| 71 | impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { | 71 | impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { |
| 72 | unsafe fn on_interrupt() { | 72 | unsafe fn on_interrupt() { |
| 73 | let r = T::regs(); | 73 | let r = T::regs(); |
| 74 | let s = T::state(); | 74 | let s = T::state(); |
| @@ -108,7 +108,7 @@ impl<'d, T: Instance> Uarte<'d, T> { | |||
| 108 | /// Create a new UARTE without hardware flow control | 108 | /// Create a new UARTE without hardware flow control |
| 109 | pub fn new( | 109 | pub fn new( |
| 110 | uarte: impl Peripheral<P = T> + 'd, | 110 | uarte: impl Peripheral<P = T> + 'd, |
| 111 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 111 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 112 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 112 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 113 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 113 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 114 | config: Config, | 114 | config: Config, |
| @@ -120,7 +120,7 @@ impl<'d, T: Instance> Uarte<'d, T> { | |||
| 120 | /// Create a new UARTE with hardware flow control (RTS/CTS) | 120 | /// Create a new UARTE with hardware flow control (RTS/CTS) |
| 121 | pub fn new_with_rtscts( | 121 | pub fn new_with_rtscts( |
| 122 | uarte: impl Peripheral<P = T> + 'd, | 122 | uarte: impl Peripheral<P = T> + 'd, |
| 123 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 123 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 124 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 124 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 125 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 125 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 126 | cts: impl Peripheral<P = impl GpioPin> + 'd, | 126 | cts: impl Peripheral<P = impl GpioPin> + 'd, |
| @@ -313,7 +313,7 @@ impl<'d, T: Instance> UarteTx<'d, T> { | |||
| 313 | /// Create a new tx-only UARTE without hardware flow control | 313 | /// Create a new tx-only UARTE without hardware flow control |
| 314 | pub fn new( | 314 | pub fn new( |
| 315 | uarte: impl Peripheral<P = T> + 'd, | 315 | uarte: impl Peripheral<P = T> + 'd, |
| 316 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 316 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 317 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 317 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 318 | config: Config, | 318 | config: Config, |
| 319 | ) -> Self { | 319 | ) -> Self { |
| @@ -324,7 +324,7 @@ impl<'d, T: Instance> UarteTx<'d, T> { | |||
| 324 | /// Create a new tx-only UARTE with hardware flow control (RTS/CTS) | 324 | /// Create a new tx-only UARTE with hardware flow control (RTS/CTS) |
| 325 | pub fn new_with_rtscts( | 325 | pub fn new_with_rtscts( |
| 326 | uarte: impl Peripheral<P = T> + 'd, | 326 | uarte: impl Peripheral<P = T> + 'd, |
| 327 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 327 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 328 | txd: impl Peripheral<P = impl GpioPin> + 'd, | 328 | txd: impl Peripheral<P = impl GpioPin> + 'd, |
| 329 | cts: impl Peripheral<P = impl GpioPin> + 'd, | 329 | cts: impl Peripheral<P = impl GpioPin> + 'd, |
| 330 | config: Config, | 330 | config: Config, |
| @@ -509,7 +509,7 @@ impl<'d, T: Instance> UarteRx<'d, T> { | |||
| 509 | /// Create a new rx-only UARTE without hardware flow control | 509 | /// Create a new rx-only UARTE without hardware flow control |
| 510 | pub fn new( | 510 | pub fn new( |
| 511 | uarte: impl Peripheral<P = T> + 'd, | 511 | uarte: impl Peripheral<P = T> + 'd, |
| 512 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 512 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 513 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 513 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 514 | config: Config, | 514 | config: Config, |
| 515 | ) -> Self { | 515 | ) -> Self { |
| @@ -520,7 +520,7 @@ impl<'d, T: Instance> UarteRx<'d, T> { | |||
| 520 | /// Create a new rx-only UARTE with hardware flow control (RTS/CTS) | 520 | /// Create a new rx-only UARTE with hardware flow control (RTS/CTS) |
| 521 | pub fn new_with_rtscts( | 521 | pub fn new_with_rtscts( |
| 522 | uarte: impl Peripheral<P = T> + 'd, | 522 | uarte: impl Peripheral<P = T> + 'd, |
| 523 | _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 523 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 524 | rxd: impl Peripheral<P = impl GpioPin> + 'd, | 524 | rxd: impl Peripheral<P = impl GpioPin> + 'd, |
| 525 | rts: impl Peripheral<P = impl GpioPin> + 'd, | 525 | rts: impl Peripheral<P = impl GpioPin> + 'd, |
| 526 | config: Config, | 526 | config: Config, |
| @@ -889,7 +889,7 @@ pub(crate) mod sealed { | |||
| 889 | /// UARTE peripheral instance. | 889 | /// UARTE peripheral instance. |
| 890 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { | 890 | pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { |
| 891 | /// Interrupt for this peripheral. | 891 | /// Interrupt for this peripheral. |
| 892 | type Interrupt: Interrupt; | 892 | type Interrupt: interrupt::typelevel::Interrupt; |
| 893 | } | 893 | } |
| 894 | 894 | ||
| 895 | macro_rules! impl_uarte { | 895 | macro_rules! impl_uarte { |
| @@ -908,7 +908,7 @@ macro_rules! impl_uarte { | |||
| 908 | } | 908 | } |
| 909 | } | 909 | } |
| 910 | impl crate::uarte::Instance for peripherals::$type { | 910 | impl crate::uarte::Instance for peripherals::$type { |
| 911 | type Interrupt = crate::interrupt::$irq; | 911 | type Interrupt = crate::interrupt::typelevel::$irq; |
| 912 | } | 912 | } |
| 913 | }; | 913 | }; |
| 914 | } | 914 | } |
