diff options
| author | goueslati <[email protected]> | 2023-06-12 14:27:53 +0100 |
|---|---|---|
| committer | goueslati <[email protected]> | 2023-06-12 14:27:53 +0100 |
| commit | 2d89cfb18f00aefbfa108728dfea3398e80ea3e4 (patch) | |
| tree | 6485dacac7e61c4378ac522e709edb0a86bd7523 /embassy-rp/src/multicore.rs | |
| parent | 2dd5ce83ec0421564e85b667f5dabd592f313e5c (diff) | |
| parent | ab86b060500ceda1c80e39f35af69cb08a7b63a2 (diff) | |
fix merge conflict
Diffstat (limited to 'embassy-rp/src/multicore.rs')
| -rw-r--r-- | embassy-rp/src/multicore.rs | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/embassy-rp/src/multicore.rs b/embassy-rp/src/multicore.rs index 807fda57b..2a7e4822a 100644 --- a/embassy-rp/src/multicore.rs +++ b/embassy-rp/src/multicore.rs | |||
| @@ -50,7 +50,7 @@ | |||
| 50 | use core::mem::ManuallyDrop; | 50 | use core::mem::ManuallyDrop; |
| 51 | use core::sync::atomic::{compiler_fence, AtomicBool, Ordering}; | 51 | use core::sync::atomic::{compiler_fence, AtomicBool, Ordering}; |
| 52 | 52 | ||
| 53 | use crate::interrupt::Interrupt; | 53 | use crate::interrupt::InterruptExt; |
| 54 | use crate::peripherals::CORE1; | 54 | use crate::peripherals::CORE1; |
| 55 | use crate::{gpio, interrupt, pac}; | 55 | use crate::{gpio, interrupt, pac}; |
| 56 | 56 | ||
| @@ -106,6 +106,7 @@ impl<const SIZE: usize> Stack<SIZE> { | |||
| 106 | } | 106 | } |
| 107 | } | 107 | } |
| 108 | 108 | ||
| 109 | #[cfg(feature = "rt")] | ||
| 109 | #[interrupt] | 110 | #[interrupt] |
| 110 | #[link_section = ".data.ram_func"] | 111 | #[link_section = ".data.ram_func"] |
| 111 | unsafe fn SIO_IRQ_PROC1() { | 112 | unsafe fn SIO_IRQ_PROC1() { |
| @@ -156,7 +157,7 @@ where | |||
| 156 | 157 | ||
| 157 | IS_CORE1_INIT.store(true, Ordering::Release); | 158 | IS_CORE1_INIT.store(true, Ordering::Release); |
| 158 | // Enable fifo interrupt on CORE1 for `pause` functionality. | 159 | // Enable fifo interrupt on CORE1 for `pause` functionality. |
| 159 | unsafe { interrupt::SIO_IRQ_PROC1::enable() }; | 160 | unsafe { interrupt::SIO_IRQ_PROC1.enable() }; |
| 160 | 161 | ||
| 161 | entry() | 162 | entry() |
| 162 | } | 163 | } |
| @@ -297,6 +298,7 @@ fn fifo_read() -> u32 { | |||
| 297 | 298 | ||
| 298 | // Pop a value from inter-core FIFO, `wfe` until available | 299 | // Pop a value from inter-core FIFO, `wfe` until available |
| 299 | #[inline(always)] | 300 | #[inline(always)] |
| 301 | #[allow(unused)] | ||
| 300 | fn fifo_read_wfe() -> u32 { | 302 | fn fifo_read_wfe() -> u32 { |
| 301 | unsafe { | 303 | unsafe { |
| 302 | let sio = pac::SIO; | 304 | let sio = pac::SIO; |
