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authorDario Nieuwenhuis <[email protected]>2023-06-08 16:08:40 +0200
committerDario Nieuwenhuis <[email protected]>2023-06-08 18:00:48 +0200
commit921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 (patch)
treebd21fba9800471b860ca44e05567588dcc1afef7 /embassy-rp/src/timer.rs
parent87ad66f2b4a5bfd36dfc8d8aad5492e9e3f915e6 (diff)
Make interrupt module more standard.
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`. - Reexport the PAC interrupt enum in `embassy_xx::interrupt`. This has a few advantages: - The `embassy_xx::interrupt` module is now more "standard". - It works with `cortex-m` functions for manipulating interrupts, for example. - It works with RTIC. - the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs. - When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
Diffstat (limited to 'embassy-rp/src/timer.rs')
-rw-r--r--embassy-rp/src/timer.rs10
1 files changed, 5 insertions, 5 deletions
diff --git a/embassy-rp/src/timer.rs b/embassy-rp/src/timer.rs
index 68793950f..37f86c930 100644
--- a/embassy-rp/src/timer.rs
+++ b/embassy-rp/src/timer.rs
@@ -6,7 +6,7 @@ use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
6use embassy_sync::blocking_mutex::Mutex; 6use embassy_sync::blocking_mutex::Mutex;
7use embassy_time::driver::{AlarmHandle, Driver}; 7use embassy_time::driver::{AlarmHandle, Driver};
8 8
9use crate::interrupt::Interrupt; 9use crate::interrupt::InterruptExt;
10use crate::{interrupt, pac}; 10use crate::{interrupt, pac};
11 11
12struct AlarmState { 12struct AlarmState {
@@ -145,10 +145,10 @@ pub unsafe fn init() {
145 w.set_alarm(2, true); 145 w.set_alarm(2, true);
146 w.set_alarm(3, true); 146 w.set_alarm(3, true);
147 }); 147 });
148 interrupt::TIMER_IRQ_0::enable(); 148 interrupt::TIMER_IRQ_0.enable();
149 interrupt::TIMER_IRQ_1::enable(); 149 interrupt::TIMER_IRQ_1.enable();
150 interrupt::TIMER_IRQ_2::enable(); 150 interrupt::TIMER_IRQ_2.enable();
151 interrupt::TIMER_IRQ_3::enable(); 151 interrupt::TIMER_IRQ_3.enable();
152} 152}
153 153
154#[interrupt] 154#[interrupt]