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authorbenjaminschlegel87 <[email protected]>2025-07-25 20:39:40 +0200
committerGitHub <[email protected]>2025-07-25 20:39:40 +0200
commitdbc1818acd69e2e15ac574356c9b07cb717df441 (patch)
tree05e6360c1946183b524a1ce82268547fe4bbcfd0 /embassy-stm32/src/can/fd/message_ram/txbuffer_element.rs
parentadb728009ceba095d2190038ff698aaee08907a9 (diff)
parent996974e313fa5ec2c7c2d9dd0998fab244c0a180 (diff)
Merge branch 'embassy-rs:main' into stm32_adc_v3_hw_oversampling_support
Diffstat (limited to 'embassy-stm32/src/can/fd/message_ram/txbuffer_element.rs')
-rw-r--r--embassy-stm32/src/can/fd/message_ram/txbuffer_element.rs18
1 files changed, 9 insertions, 9 deletions
diff --git a/embassy-stm32/src/can/fd/message_ram/txbuffer_element.rs b/embassy-stm32/src/can/fd/message_ram/txbuffer_element.rs
index 455406a1c..6d65a86cb 100644
--- a/embassy-stm32/src/can/fd/message_ram/txbuffer_element.rs
+++ b/embassy-stm32/src/can/fd/message_ram/txbuffer_element.rs
@@ -376,47 +376,47 @@ impl R {
376impl W { 376impl W {
377 #[doc = "Byte 0 - Bits 0:28 - ID"] 377 #[doc = "Byte 0 - Bits 0:28 - ID"]
378 #[inline(always)] 378 #[inline(always)]
379 pub fn id(&mut self) -> ID_W { 379 pub fn id(&mut self) -> ID_W<'_> {
380 ID_W { w: self } 380 ID_W { w: self }
381 } 381 }
382 #[doc = "Byte 0 - Bit 29 - RTR"] 382 #[doc = "Byte 0 - Bit 29 - RTR"]
383 #[inline(always)] 383 #[inline(always)]
384 pub fn rtr(&mut self) -> RTR_W { 384 pub fn rtr(&mut self) -> RTR_W<'_> {
385 RTR_W { w: self } 385 RTR_W { w: self }
386 } 386 }
387 #[doc = "Byte 0 - Bit 30 - XTD"] 387 #[doc = "Byte 0 - Bit 30 - XTD"]
388 #[inline(always)] 388 #[inline(always)]
389 pub fn xtd(&mut self) -> XTD_W { 389 pub fn xtd(&mut self) -> XTD_W<'_> {
390 XTD_W { w: self } 390 XTD_W { w: self }
391 } 391 }
392 #[doc = "Byte 0 - Bit 31 - ESI"] 392 #[doc = "Byte 0 - Bit 31 - ESI"]
393 #[inline(always)] 393 #[inline(always)]
394 pub fn esi(&mut self) -> ESI_W { 394 pub fn esi(&mut self) -> ESI_W<'_> {
395 ESI_W { w: self } 395 ESI_W { w: self }
396 } 396 }
397 #[doc = "Byte 1 - Bit 16:19 - DLC"] 397 #[doc = "Byte 1 - Bit 16:19 - DLC"]
398 #[inline(always)] 398 #[inline(always)]
399 pub fn dlc(&mut self) -> DLC_W { 399 pub fn dlc(&mut self) -> DLC_W<'_> {
400 DLC_W { w: self } 400 DLC_W { w: self }
401 } 401 }
402 #[doc = "Byte 1 - Bit 20 - BRS"] 402 #[doc = "Byte 1 - Bit 20 - BRS"]
403 #[inline(always)] 403 #[inline(always)]
404 pub fn brs(&mut self) -> BRS_W { 404 pub fn brs(&mut self) -> BRS_W<'_> {
405 BRS_W { w: self } 405 BRS_W { w: self }
406 } 406 }
407 #[doc = "Byte 1 - Bit 21 - FDF"] 407 #[doc = "Byte 1 - Bit 21 - FDF"]
408 #[inline(always)] 408 #[inline(always)]
409 pub fn fdf(&mut self) -> FDF_W { 409 pub fn fdf(&mut self) -> FDF_W<'_> {
410 FDF_W { w: self } 410 FDF_W { w: self }
411 } 411 }
412 #[doc = "Byte 1 - Bit 23 - EFC"] 412 #[doc = "Byte 1 - Bit 23 - EFC"]
413 #[inline(always)] 413 #[inline(always)]
414 pub fn efc(&mut self) -> EFC_W { 414 pub fn efc(&mut self) -> EFC_W<'_> {
415 EFC_W { w: self } 415 EFC_W { w: self }
416 } 416 }
417 #[doc = "Byte 1 - Bit 24:31 - MM"] 417 #[doc = "Byte 1 - Bit 24:31 - MM"]
418 #[inline(always)] 418 #[inline(always)]
419 pub fn mm(&mut self) -> MM_W { 419 pub fn mm(&mut self) -> MM_W<'_> {
420 MM_W { w: self } 420 MM_W { w: self }
421 } 421 }
422 #[doc = "Convenience function for setting the data length and frame format"] 422 #[doc = "Convenience function for setting the data length and frame format"]