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authorxoviat <[email protected]>2023-09-16 22:59:26 +0000
committerGitHub <[email protected]>2023-09-16 22:59:26 +0000
commit3ddc9cd110cb56f2ba9ac491b42df19a9b9c3fd4 (patch)
tree51bd62184591e1bdc6dc8e873ba8b713058bedd9 /examples
parent2930be5e17990e34ef162a7498c51e1d593096a3 (diff)
parentde2773afdd3f2d06cad0632ee075e1b88aa71515 (diff)
Merge pull request #1915 from xoviat/rcc
stm32/rcc: convert bus prescalers to pac enums
Diffstat (limited to 'examples')
-rw-r--r--examples/stm32f2/src/bin/pll.rs4
-rw-r--r--examples/stm32h5/src/bin/eth.rs8
-rw-r--r--examples/stm32h5/src/bin/usb_serial.rs8
3 files changed, 10 insertions, 10 deletions
diff --git a/examples/stm32f2/src/bin/pll.rs b/examples/stm32f2/src/bin/pll.rs
index 17f09538c..894937614 100644
--- a/examples/stm32f2/src/bin/pll.rs
+++ b/examples/stm32f2/src/bin/pll.rs
@@ -39,9 +39,9 @@ async fn main(_spawner: Spawner) {
39 // System clock comes from PLL (= the 120 MHz main PLL output) 39 // System clock comes from PLL (= the 120 MHz main PLL output)
40 config.rcc.mux = ClockSrc::PLL; 40 config.rcc.mux = ClockSrc::PLL;
41 // 120 MHz / 4 = 30 MHz APB1 frequency 41 // 120 MHz / 4 = 30 MHz APB1 frequency
42 config.rcc.apb1_pre = APBPrescaler::Div4; 42 config.rcc.apb1_pre = APBPrescaler::DIV4;
43 // 120 MHz / 2 = 60 MHz APB2 frequency 43 // 120 MHz / 2 = 60 MHz APB2 frequency
44 config.rcc.apb2_pre = APBPrescaler::Div2; 44 config.rcc.apb2_pre = APBPrescaler::DIV2;
45 45
46 let _p = embassy_stm32::init(config); 46 let _p = embassy_stm32::init(config);
47 47
diff --git a/examples/stm32h5/src/bin/eth.rs b/examples/stm32h5/src/bin/eth.rs
index c32e0fdb5..fdba6cd5c 100644
--- a/examples/stm32h5/src/bin/eth.rs
+++ b/examples/stm32h5/src/bin/eth.rs
@@ -48,10 +48,10 @@ async fn main(spawner: Spawner) -> ! {
48 divq: Some(2), 48 divq: Some(2),
49 divr: None, 49 divr: None,
50 }); 50 });
51 config.rcc.ahb_pre = AHBPrescaler::NotDivided; 51 config.rcc.ahb_pre = AHBPrescaler::DIV1;
52 config.rcc.apb1_pre = APBPrescaler::NotDivided; 52 config.rcc.apb1_pre = APBPrescaler::DIV1;
53 config.rcc.apb2_pre = APBPrescaler::NotDivided; 53 config.rcc.apb2_pre = APBPrescaler::DIV1;
54 config.rcc.apb3_pre = APBPrescaler::NotDivided; 54 config.rcc.apb3_pre = APBPrescaler::DIV1;
55 config.rcc.sys = Sysclk::Pll1P; 55 config.rcc.sys = Sysclk::Pll1P;
56 config.rcc.voltage_scale = VoltageScale::Scale0; 56 config.rcc.voltage_scale = VoltageScale::Scale0;
57 let p = embassy_stm32::init(config); 57 let p = embassy_stm32::init(config);
diff --git a/examples/stm32h5/src/bin/usb_serial.rs b/examples/stm32h5/src/bin/usb_serial.rs
index 336eed644..cbe540a06 100644
--- a/examples/stm32h5/src/bin/usb_serial.rs
+++ b/examples/stm32h5/src/bin/usb_serial.rs
@@ -35,10 +35,10 @@ async fn main(_spawner: Spawner) {
35 divq: None, 35 divq: None,
36 divr: None, 36 divr: None,
37 }); 37 });
38 config.rcc.ahb_pre = AHBPrescaler::Div2; 38 config.rcc.ahb_pre = AHBPrescaler::DIV2;
39 config.rcc.apb1_pre = APBPrescaler::Div4; 39 config.rcc.apb1_pre = APBPrescaler::DIV4;
40 config.rcc.apb2_pre = APBPrescaler::Div2; 40 config.rcc.apb2_pre = APBPrescaler::DIV2;
41 config.rcc.apb3_pre = APBPrescaler::Div4; 41 config.rcc.apb3_pre = APBPrescaler::DIV4;
42 config.rcc.sys = Sysclk::Pll1P; 42 config.rcc.sys = Sysclk::Pll1P;
43 config.rcc.voltage_scale = VoltageScale::Scale0; 43 config.rcc.voltage_scale = VoltageScale::Scale0;
44 let p = embassy_stm32::init(config); 44 let p = embassy_stm32::init(config);