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authorxoviat <[email protected]>2025-11-21 08:22:31 -0600
committerxoviat <[email protected]>2025-11-21 08:22:31 -0600
commit14436ce1300a5d621b617d56ee037e09ce55ea0a (patch)
tree84b0509869731a69b38178fbf4d632e96f28da13 /tests/stm32/src/common.rs
parent1cc2643ae60d429d0389213f5c1f6bbc007c6a2b (diff)
adc: add test for wba
Diffstat (limited to 'tests/stm32/src/common.rs')
-rw-r--r--tests/stm32/src/common.rs1
1 files changed, 1 insertions, 0 deletions
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
index 096cce947..9f88b182a 100644
--- a/tests/stm32/src/common.rs
+++ b/tests/stm32/src/common.rs
@@ -259,6 +259,7 @@ define_peris!(
259define_peris!( 259define_peris!(
260 UART = LPUART1, UART_TX = PB5, UART_RX = PA10, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, 260 UART = LPUART1, UART_TX = PB5, UART_RX = PA10, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1,
261 SPI = SPI1, SPI_SCK = PB4, SPI_MOSI = PA15, SPI_MISO = PB3, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, 261 SPI = SPI1, SPI_SCK = PB4, SPI_MOSI = PA15, SPI_MISO = PB3, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1,
262 ADC = ADC4, DAC_PIN = PA0,
262 @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;}, 263 @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;},
263); 264);
264#[cfg(feature = "stm32h7s3l8")] 265#[cfg(feature = "stm32h7s3l8")]